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74SSTUBH32865A

Obsolete

28-Bit 1:2 Registered Buffer for DDR2

74SSTUBH32865A Datasheet

Overview

Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for DDR2 RDIMMs for 400, 533, 667 and 800MHz.

Documentation

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Type Title Date
Datasheet
74SSTUBH32865A Datasheet
PDF 537 KB
1 item

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.

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