Features
- 1:1 and 1:2 registered buffer
- 1.8V Operation
- SSTL_18 style clock and data inputs
- Differential CLK input
- Control inputs compatible with LVCMOS levels
- Flow-through architecture for optimum PCB design
- Latch-up performance exceeds 100mA
- ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0)
- Maximum operating frequency: 340MHz
Description
Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for non parity DDR2 RDIMMs for 400 and 533MHz.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Temp. Grade | Pb (Lead) Free | Carrier Type |
|---|---|---|---|---|---|---|---|---|
| 74SSTU32864CBFG | Obsolete | N/A | Out of Stock | CABGA | 96# | C | Yes | Tray |
| 74SSTU32864CBFG8 | Obsolete | N/A | Out of Stock | CABGA | 96# | C | Yes | Reel |
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- Product Change NoticePDF 24 KB 7WDXRDKU4E7E-5-41812 Nov 14, 2012
- Product Change NoticePDF 252 KB 7WDXRDKU4E7E-5-41817 Oct 20, 2006
- Product Change NoticePDF 80 KB 7WDXRDKU4E7E-5-41813 Dec 14, 2004
- Product Change NoticePDF 80 KB 7WDXRDKU4E7E-5-41766 Dec 08, 2004
- Product Change NoticePDF 79 KB 7WDXRDKU4E7E-5-41700 Nov 05, 2004
- Model - SPICE
- End Of Life NoticePDF 84 KB 7WDXRDKU4E7E-5-41588 Apr 26, 2005
- Product Change NoticePDF 194 KB 7WDXRDKU4E7E-5-41715 Aug 31, 2006
- Product Change NoticePDF 729 KB 7WDXRDKU4E7E-5-41697 Dec 16, 2005
- End Of Life NoticePDF 407 KB 7WDXRDKU4E7E-5-57649 Sep 08, 2014
- End Of Life NoticePDF 192 KB 7WDXRDKU4E7E-5-57647 Sep 04, 2014
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- End Of Life NoticePDF 407 KB 7WDXRDKU4E7E-5-57649 Sep 08, 2014
- End Of Life NoticePDF 192 KB 7WDXRDKU4E7E-5-57647 Sep 04, 2014
- Product Change NoticePDF 24 KB 7WDXRDKU4E7E-5-41812 Nov 14, 2012
- Product Change NoticePDF 252 KB 7WDXRDKU4E7E-5-41817 Oct 20, 2006
- Product Change NoticePDF 194 KB 7WDXRDKU4E7E-5-41715 Aug 31, 2006View More (11)
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