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Features

  • Typical tSK(o) (output skew) < 250ps
  • ESD > 2000V per MIL-STD-883, Method 3015
  • > 200V using machine model (C = 200pF, R = 0)
  • VCCA = 2.7V to 3.6V
  • VCCB = 5V ± 0.5V
  • CMOS power levels (0.4µW typ. static)
  • Rail-to-rail output swing for increased noise margin
  • Available in 48-pin SSOP and TSSOP packages

Description

The 74ALVC164245 16-bit 3.3V to 5V level shifting transceiver contains two separate supply rails; Port B has VCCB, which is set at 5V, and Port A has VCCA, which is set to operate at 3.3V. This allows for translation from a 3.3V to a 5V environment and vice-versa. This device is designed for asynchronous communication between data buses. The 74ALVC164245 operates at -40 °C to +85 °C.

Parameters

Attributes Value
Function Transceiver
Pkg. Code PAG48, PVG48
Temp. Range (°C) -40 to 85°C
Bus Width (bits) 16
Core Voltage (V) 3.3
Output Type 3-state
Speed Grade Standard

Package Options

Pkg. Type Pkg. Dimensions (mm) Lead Count (#) Pitch (mm)
SSOP 15.9 x 7.5 x 2.3 48 0.64
TSSOP 12.5 x 6.1 x 1.0 48 0.5

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