Skip to main content
Renesas Electronics Corporation - June is Pride Month, a month to raise awareness of the rights and the culture of the LGBTQ+ community

Features

  • Total Available Memory = 1,179,648 bits
  • Available Memory in blocks of 256 x 36
  • Independent Read and Write access per queue
  • 100% Bus Utilization, Read and Write on every clock cycle
  • 166 MHz High speed operation (6ns cycle time)
  • 3.7ns access time
  • Global Bus Matching - (All Queues have same Input Bus Width and Output Bus Width)
  • User Selectable Bus Matching Options: – x36in to x36out – x18in to x36out – x9in to x36out – x36in to x18out – x36in to x9out
  • FWFT mode of operation on read port
  • JTAG Functionality (Boundary Scan)
  • Available in a 256-pin PBGA package
  • Industrial temperature range (-40C to +85C) is available

Description

The 72V51446 multi-queue flow-control device is a single chip within which between 1 and 16 discrete FIFO queues can be setup. All queues within the device have common data input bus, (write port) and a common data output bus, (read port). Data written into the write port is directed to a respective queue via an internal de-multiplex operation, addressed by the user. Data read from the read port is accessed from a respective queue via an internal multiplex operation, addressed by the user.

Part NumberStatusSamplesStockPackageLead Count (#)Temp. GradePb (Lead) FreeCarrier Type
72V51446L6BBObsoleteN/AOut of StockPBGA256#CNoTray
72V51446L6BB8ObsoleteN/AOut of StockPBGA256#CNoReel
72V51446L7-5BBObsoleteN/AOut of StockPBGA256#CNoTray
72V51446L7-5BB8ObsoleteN/AOut of StockPBGA256#CNoReel
72V51446L7-5BBIObsoleteN/AOut of StockPBGA256#INoTray
Support Communities

Support Communities

Get quick technical support online from Renesas Engineering Community technical staff.
Browse Articles

Knowledge Base

Browse our knowledge base for helpful articles, FAQs, and other useful resources.
Submit a Ticket

Submit a Ticket

Need to ask a technical question or share confidential information?