Overview
Description
The 72215 is a 512 x 8 First-In, First-Out memory with clocked read and write controls and would be useful for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. These FIFOs have 18-bit input and output ports. The read clock can be tied to the write clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. These devices are depth expandable using a Daisy-Chain technique.
Features
- 10 ns read/write cycle time
- Empty and Full flags signal FIFO status
- Easy expandable in depth and width
- Asynchronous or coincident read and write clocks
- Programmable Almost-Empty and Almost-Full flags with default settings
- Half-Full flag capability
- Dual-Port zero fall-through time architecture
- Output enable puts output data bus in high-impedance state
- Available in 64-pin TQFP, STQFP and 68-pin PLCC packages
- Industrial temperature range (–40C to +85C) is available
Comparison
Applications
Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
Support
Support Communities
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Support Communities
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Voltage drops due to battery contact
hi, we have a issue with voltage drops due to battery contact (drop voltage can be longer than a 100mSec) , we decided to add a supervisor IC that connected to RST pin. As long as a supply voltage is at least 2.3v then RST pin is at High Z ...
Dec 6, 2016