Lead Count (#) | 119 |
Pkg. Code | BG119 |
Pitch (mm) | 1.27 |
Pkg. Type | PBGA |
Pkg. Dimensions (mm) | 14.0 x 22.0 x 2.15 |
Pb (Lead) Free | No |
Moisture Sensitivity Level (MSL) | 3 |
ECCN (US) | NLR |
HTS (US) | 8542320041 |
Lead Count (#) | 119 |
Pb (Lead) Free | No |
Carrier Type | Tray |
Moisture Sensitivity Level (MSL) | 3 |
Price (USD) | 1ku | 23.80187 |
Architecture | ZBT |
Bus Width (bits) | 36 |
Core Voltage (V) | 3.3 |
Cycle Time (ns) | 85 |
Density (Kb) | 9216 |
I/O Voltage (V) | 2.5 - 2.5 |
Length (mm) | 14.0 |
MOQ | 252 |
Organization | 256K x 36 |
Output Type | Flowthrough |
Package Area (mm²) | 308.0 |
Pb Free Category | e0 |
Pitch (mm) | 1.27 |
Pkg. Dimensions (mm) | 14.0 x 22.0 x 2.15 |
Pkg. Type | PBGA |
Qty. per Carrier (#) | 84 |
Qty. per Reel (#) | 0 |
Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
Tape & Reel | No |
Temp. Range | -40 to 85°C |
Thickness (mm) | 2.15 |
Width (mm) | 22.0 |
The 71V65703 3.3V CMOS SRAM, organized as 256K x 36, is designed to eliminate dead bus cycles when turning the bus around between reads and writes or writes and reads. Thus it has been given the name ZBT™, or Zero Bus Turnaround. The 71V65703 contains address, data-in, and control signal registers. The outputs are flow-through (no output data register). In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.