Features
- Equal access and cycle times – Commercial and Industrial: 12/15/20ns
- One Chip Select plus one Output Enable pin
- Bidirectional data inputs and outputs directly TTL compatible
- Low power consumption via chip deselect
- Upper and Lower Byte Enable Pins
- Available in 44-pin Plastic SOJ and 44-pin TSOP packages
71016 - Block Diagram
Description
The 71016 5V CMOS SRAM is organized as 64K x 16. All bidirectional inputs and outputs of the 71016 are TTL compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.
Parameters
| Attributes | Value |
|---|---|
| Density (Kb) | 1024 |
| Bus Width (bits) | 16 |
| Core Voltage (V) | 5 |
| Organization | 64K x 16 |
| I/O Voltage (V) | 5 - 5 |
| Access Time (ns) | 12, 15, 20 |
| Temp. Range (°C) | -40 to 85°C, 0 to 70°C |
| Architecture | Asynchronous |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| TSOP | 18.41 x 10.16 x 1.0 | 44 | 0.8 |
Support Communities
-
How many years are there for end of years for the part number
71016S12PHG and 71016S12PHG8?
How many years are there for end of years for the part number 71016S12PHG and 71016S12PHG8?
Aug 18, 2025 -
Source Code for Serial Port Android APP
Hi, Would it be possible to get the source code for the DSPS android app? Thanks
Sep 22, 2015
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