Features
- True dual-ported memory cells which allow simultaneous reads of the same memory location
- Easily expands data bus width to 16 bits or more
- Interrupt flag
- On-chip port arbitration logic
- Full on-chip hardware support of semaphore signaling between ports
- Fully asynchronous operation from either port
- TTL-compatible, single 3.3V (±0.3V) power supply
- Available in 68-pin PGA and PLCC, and 80-pin TQFP packages
- Industrial temperature range (-40 °C to +85 °C) is available
Description
The 70V07 is a high-speed 32K x 8 dual-port static RAM designed to be used as a stand-alone 256K-bit dual-port SRAM or as a combination Master/Slave dual-port SRAM for 16-bit or more word systems which results in full-speed, error-free operation without the need for additional discrete logic. An automatic power-down feature controlled by Chip Enable (CE) permits the on-chip circuitry of each port to enter a very low standby power mode.
Parameters
| Attributes | Value |
|---|---|
| Core Voltage (V) | 3.3 |
| Bus Width (bits) | 8 |
| Density (Kb) | 256 |
| Pkg. Code | PNG80 |
| Interface | Async |
| I/O Type | 3.3 V LVTTL |
| Access Time (ns) | 35 |
| Temp. Range (°C) | -40 to 85°C |
| Architecture | Dual-Port |
| Organization | 32K x 8 |
| Function | Busy, Interrupt, Master, Semaphore, Slave |
Package Options
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| TQFP | 14.0 x 14.0 x 1.4 | 80 | 0.65 |