Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to SalesClocks@sitime.com. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG16 |
| Lead Count (#): | 16 |
| Pkg. Dimensions (mm): | 3.0 x 3.0 x 1.0 |
| Pitch (mm): | 0.5 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 16 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Carrier (#) | 624 |
| Package Area (mm²) | 9 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 3.0 x 3.0 x 1.0 |
| Qty. per Reel (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Advanced Features | Spread Spectrum |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3 |
| Architecture | Common, SRNS |
| C-C Jitter Max P-P (ps) | 80 |
| Core Voltage (V) | 3.3 |
| Diff. Output Signaling | HCSL |
| Diff. Outputs | 2 |
| Diff. Termination Resistors | 8 |
| Input Freq (MHz) | 25 - 25 |
| Input Type | Crystal, LVCMOS |
| Inputs (#) | 1 |
| Length (mm) | 3 |
| MOQ | 624 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 25 - 25, 100 - 100, 125 - 125, 200 - 200 |
| Output Skew (ps) | 50 |
| Output Type | HCSL |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 2 |
| PLL | Yes |
| Phase Jitter Max RMS (ps) | 1 |
| Phase Jitter Typ RMS (ps) | 0.48 |
| Pkg. Type | VFQFPN |
| Power Consumption Typ (mW) | 281 |
| Product Category | PCI Express Clocks |
| Prog. Clock | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 3 |
| Xtal Freq (MHz) | 25 - 25 |
The IDT5V41315 is a PCIe Gen1/2/3 clock synthesizer suitable for use in both Common-Clocked and Separate Reference clock with No Spread (SRNS) timing architectures. The IDT5V41315 uses a 25MHz input to generate 4 different output frequencies. The output frequency is selectable via select pins.