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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to SalesClocks@sitime.com. Full transition to SiTime is expected by late 2026.

Features

  • Optimized for 2.5V LVTTL
  • Guaranteed Low Skew < 25ps (max)
  • Very low duty cycle distortion < 300ps (max)
  • High speed propagation delay < 2ns. (max)
  • Up to 200MHz operation
  • Very low CMOS power levels
  • Hot insertable and over-voltage tolerant inputs
  • 1:10 fanout buffer
  • 2.5V VDD
  • Available in TSSOP package

Description

The 5T9070 2.5V single data rate (SDR) clock buffer is a single-ended input to ten single-ended outputs buffer built on advanced metal CMOS technology. The SDR clock buffer fanout from a single input to ten single-ended outputs reduces the loading on the preceding driver and provides an efficient clock distribution network. The 5T9070 has two output banks that can be asynchronously enabled/ disabled. Multiple power and grounds reduce noise.

Part NumberStatusSamplesStockPackageLead Count (#)Temp. GradePb (Lead) FreeCarrier Type
5T9070PAGIObsoleteN/AOut of StockTSSOP48#IYesTube
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