Features
- Four copies of LVCMOS output clocks with best-in-class phase noise performance
- Phase noise:
Offset noise power (3.3V)- 100Hz: -131dBc/Hz
- 1KHz: -145dBc/Hz
- 10KHz: -154dBc/Hz
- 100KHz: -161dBc/Hz
- Operating power supply modes:
- Full 3.3V, 2.5V, 1.8V
- Mixed 3.3V core/2.5V output operating supply
- Mixed 3.3V core/1.8 V output operating supply
- Mixed 2.5V core/1.8 V output operating supply
- Crystal oscillator interface
- Synchronous Output Enable
- Packaged in 16-pin TSSOP and QFN packages
- Extended temperature range (-40 °C to +105 °C)
Description
The 5P83904 is a high-performance, 1-to-4 crystal input to LVCMOS fanout buffer with output enable pins. This device accepts a fundamental mode crystal from 10MHz to 40MHz and outputs LVCMOS clocks with best-in-class phase noise performance.
The 5P83904 features a synchronous glitch-free Output Enable function to eliminate any intermediate incorrect output clock cycles when enabling or disabling outputs. It comes in standard TSSOP packages or small QFN packages and can operate from 1.8V to 3.3V supplies.
Parameters
Attributes | Value |
---|---|
Function | Buffer |
Outputs (#) | 4 |
Output Type | LVCMOS |
Output Freq Range (MHz) | - |
Input Type | Crystal, LVCMOS |
Output Banks (#) | 1 |
Output Voltage (V) | 1.8, 2.5, 3.3 |
Output Skew (ps) | 65 |
Additive Phase Jitter Typ RMS (fs) | 50 |
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Software & Tools
Sample Code
Simulation Models
This video provides an overview of the LVCMOS High Performance Clock Buffer Family, highlighting their key features and capabilities.
Related Resources
This video overviews the LVCMOS Fanout Buffers, showcasing their best-in-class performance with extremely low phase jitter, minimal output skew, and low power consumption, along with other competitive features.
News & Blog Posts
News
Mar 24, 2015
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