Lead Count (#) | 48 |
Pkg. Code | NDG48 |
Pitch (mm) | 0.4 |
Pkg. Type | VFQFPN |
Pkg. Dimensions (mm) | 6.0 x 6.0 x 0.9 |
Moisture Sensitivity Level (MSL) | 3 |
Pb (Lead) Free | Yes |
ECCN (US) | EAR99 |
HTS (US) | 8542.39.0090 |
Lead Count (#) | 48 |
Carrier Type | Reel |
Moisture Sensitivity Level (MSL) | 3 |
Qty. per Reel (#) | 2500 |
Qty. per Carrier (#) | 0 |
Pb (Lead) Free | Yes |
Pb Free Category | e3 Sn |
Temp. Range | -40 to +85°C |
Country of Assembly | Taiwan, Thailand |
Country of Wafer Fabrication | Singapore, Taiwan |
Advanced Features | Programmable Clock, Reference Output, Spread Spectrum |
App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5 |
Architecture | Common, SRNS, SRIS |
C-C Jitter Typ P-P (ps) | 46 |
Core Voltage (V) | 1.8, 2.5, 3.3 |
Diff. Output Signaling | HCSL, LP-HCSL, LVDS, LVPECL, LVCMOS |
Diff. Outputs | 11 |
Family Name | VersaClock 6E |
Function | Generator |
Input Freq (MHz) | 1 - 350 |
Input Type | Crystal, LVCMOS, LVPECL, LVDS, HCSL |
Inputs (#) | 2 |
Length (mm) | 6 |
Longevity | 2040 Apr |
MOQ | 2500 |
NXP Processor Function | Memory Clock, SerDes Clock, CPU/USB/Eth Clock |
Output Banks (#) | 4 |
Output Freq Range (MHz) | 1 - 350 |
Output Impedance | 100 |
Output Skew (ps) | 75 |
Output Type | LVCMOS, LVPECL, HCSL, LVDS, LP-HCSL |
Output Voltage (V) | 1.8, 2.5, 3.3 |
Outputs (#) | 11 |
Package Area (mm²) | 16.0 |
Phase Jitter Typ RMS (fs) | 500.000 |
Phase Jitter Typ RMS (ps) | 0.500 |
Pitch (mm) | 0.4 |
Pkg. Dimensions (mm) | 6.0 x 6.0 x 0.9 |
Pkg. Type | VFQFPN |
Power Consumption Typ (mW) | 100 |
Prog. Clock | Yes |
Prog. Interface | I2C, OTP |
Reel Size (in) | 13 |
Reference Output | Yes |
Spread Spectrum | Yes |
Supply Voltage (V) | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 |
Tape & Reel | Yes |
Thickness (mm) | 0.9 |
Width (mm) | 6 |
Xtal Freq (MHz) | 8 - 40 |
Xtal Inputs (#) | 1 |
The 5P49V6968 is a member of the VersaClock® 6E programmable clock generator family. The 5P49V6968 is intended for high-performance consumer, networking, industrial, computing, and data-communications applications. The reference clock can come from one of the two redundant clock inputs. A glitchless manual switchover function allows one of the redundant clocks to be selected during normal operation.
Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I²C interface.