Features
- 8-pin SOIC package – Pb-free, RoHS compliant
- Two addressable registers
- Input crystal frequency of 5 to 27 MHz
- Clock input frequency of 3 to 150 MHz
- Output clock frequencies up to 200 MHz
- Configurable Spread Spectrum Modulation
- Operating voltage of 3.3 V
- Replaces multiple crystals and oscillators
- Controllable output drive levels
- Advanced, low-power CMOS process
Description
The 252 is a low cost, dual-output, field programmable clock synthesizer. The 252 can generate two output frequencies from 314 kHz to 200 MHz using up to two independently configurable PLLs. The outputs may employ Spread Spectrum techniques to reduce system electro-magnetic interference (EMI). Using IDT's VersaClock™ software to configure the PLL and output, the 252 contains a One-Time Programmable (OTP) ROM to allow field programmability. Programming features include 2 selectable configuration registers. The device employs Phase-Locked Loop (PLL) techniques to run from a standard fundamental mode, inexpensive crystal, or clock. It can replace multiple crystals and oscillators, saving board space and cost. The device also has a power-down feature that tri-states the clock outputs and turns off the PLLs when the PDTS pin is taken low. The 252 is also available in factory programmed custom versions for high-volume applications.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Qty. per Reel (#) | Qty. per Carrier (#) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 252PMILF | Obsolete | N/A | Out of Stock | SOIC | 8# | Tube | 1 | 0 | 97# | Yes | e3 Sn | -40 to 85°C |
| 252PMLF | Obsolete | N/A | Out of Stock | SOIC | 8# | Tube | 1 | 0 | 97# | Yes | e3 Sn | 0 to 70°C |
| 252PMLFT | Obsolete | N/A | Out of Stock | SOIC | 8# | Reel | 1 | 3000# | 0 | Yes | e3 Sn | 0 to 70°C |
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- Application NotePDF 187 KB R31AN0065EU0101 Rev.1.01 Nov 14, 2023
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- Application NotePDF 170 KB 7WDXRDKU4E7E-5-57318 May 13, 2014
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- Application NotePDF 442 KB 7WDXRDKU4E7E-5-57298 May 08, 2014
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- Application NotePDF 187 KB R31AN0065EU0101 Rev.1.01 Nov 14, 2023
- Application NotePDF 1.99 MB 7WDXRDKU4E7E-5-57242 Mar 01, 2022
Application Notes & White Papers (21)
- End Of Life NoticePDF 1.07 MB Mar 31, 2023
- Product Change NoticePDF 26 KB 7WDXRDKU4E7E-5-63498 Dec 14, 2018
- Product Change NoticePDF 611 KB 7WDXRDKU4E7E-5-60321 Apr 14, 2016
- Product Change NoticePDF 611 KB 7WDXRDKU4E7E-5-59927 Feb 15, 2016
- Product Change NoticePDF 95 KB 7WDXRDKU4E7E-5-59609 Oct 22, 2015View More
Product Notices (PCN, EOL, etc) (6)
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Support Communities
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Synergy™︎ MCU
Support Forum for Synergy Products
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UART2 handler loop
I'm trying to enable serial output in my project using the CFG_PRINTF define, but it's causing my program to go into what appears to be an infinite loop in the UART2_Handler function. Stepping through the code I can see the 'idd' value read from the UART2 ...
May 25, 2017 -
DSPS project use an external Atmel processor
Hello MT_dialog, We have achieved the DSPS project on the DA14580 Development Kit - Basic with UART and SPI configuration. We want to use our micro controller with UART connection pins of the board to use the DA 14580 Bluetooth chip and our ATMEL processor . How to add our code ...
May 28, 2017
Knowledge Base
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Considerations when Creating a Custom Bootloader with SSP
... booting and resetting the MCU. Consider carefully how the application needs to manage these resources.You can find all the Synergy related booting resources and programs here: https://www.renesas.com/us/en/search/keyword-search.html#q=synergy%2520boot&rows=20
Aug 26, 2020 -
What are the key advantages to normally off d-mode (cascode) GaN vs. e-mode GaN?
... Q+R (static)Dynamic much worse than static Die size Smaller to achieve same power Larger to achieve same power Thermal performance (72 mΩ) 50°C at 1500 W83°C at 2526 W 80°C at 1500 W *Unless specified, data is based on a 50 mΩ device. 日本語 中文
Nov 1, 2024