Overview
Description
Our ADC promotional board with on Board Lattice ECP3-70 FPGA enable usage of JESD204A full features sets. This demonstration board enables one channel ADC dynamic performance evaluation for analog input up to 30 MHz
Features
- Access to one ADC channel
- Optional external ADC sample clock ( via SMA connector )
- USB-powered demonstration board
- 66.66 MHz on Board Oscillator for ADC sample clock
Applications
Documentation
Featured Documentation
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| Manual - Software | ZIP 4.14 MB | |
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Design & Development
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
Support
Support Communities
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