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RX62N, RX621

100 MHz high-speed operation and built-in connectivity functions such as Ethernet and USB Host

 

RX621/RX62N Group microcontrollers have 100 MHz high-speed operation and enhanced communications functions. They have built-in Ethernet (RX62N only), CAN, and two circuits of USB 2.0 host controller. A multifunction timer (MTU2, 2 units), 10-bit or 12-bit A/D converter, DMA controller, and other peripheral functions are incorporated ona single chip. Up to 512 KB flash memory and 96 KB RAM are built in, as well as 32 KB of flash memory for data storage. Packages from 85 to 176 pins are available.

 

Key Features:

RX62N

ITEM
RX62N
CPU core RX CPU
  • General registers: 32-bit x 16
  • Multiplier: 32-bit multiplier
  • Divider: Yes
  • Multiply-accumulator: Yes (two types: memory-to-memory operations and register-to-register operations)
  • Memory-protection unit (MPU)
Maximum operating frequency 100MHz
Power supply voltage 2.7 to 3.6V
Floating-point processing unit Single-precision floating-point processing unit
(Supports add/subtract/compare/multiply/divide and other instructions)
Program Flash Max. 512KB
Data Flash
32KB
SRAM Max. 96KB
On-chip peripheral functions
  • Direct memory access controller (DMAC) x 4 channels
  • Data transfer controller (DTC)
  • Direct memory access controller designed exclusively (EXDMAC)
    x 2 channels (Over 144-pin PKG Only)
  • 16-bit multifunction timer pulse unit (MTU2) x 12 channels
  • Port output enable
  • 16-bit compare match timer x 4 channels
  • 8-bit timer (TMR) x 4 channels
  • 4-bit Programmable pulse generator (PPG) x 2 channels (max)
  • 14-bit Independent watchdog timer (IWDT)
  • 8-bit Watchdog timer (WDT)
  • Realtime clock (RTC)
  • Serial communication interface (SCI) x 6 channels
  • I2C bus interface:Except 100-pin [2 channels], 100-pin [1channel]
  • Serial peripheral interface (RSPI) x 2 channels
  • SDRAM interface (max. 32-bit width;Over 144-pin PKG Only)
  • A/D converter (10-bit) x 8 channels [4 channels x 2 units] or (12-bit) x 8 channels [8 channels x 1 unit] (12-bit and 10-bit can not use at the same time.)
  • D/A converter (10-bit): Except 100-pin [2 channels], 100-pin [1channel]
  • USB2.0FullSpeed: 176-pin [2 channels, H/F/OTG], Except 176-pin [1channel, H/F/OTG]
  • CAN x 1 channel
  • EtherC with dedicated DMAC x 1 channel
  • CRC calculator
  • Low-speed on-chip oscillator (OCO)
  • Power-on reset circuit (POR)
  • Voltage detection circuit (LVD)
On-chip debugging function Yes (with trace function)
Low power consumption modes 4 modes
  • Sleep mode
  • All-module clock stop mode
  • Software standby mode
  • Deep software standby mode
Packages PLQP0100KB-A (100-pin LFQFP, 14 x 14mm 0.5mm pitch)
PLQP0144KA-A (144-pin LFQFP, 20 x 20mm 0.5mm pitch)
PLBG0176GA-A (176-pin LFBGA, 13 x 13mm 0.8mm pitch)
PTLG0145JB-A (145-pin TFLGA, 9 x 9mm 0.65mm pitch)

 

RX621

ITEM RX621
CPU core RX CPU
  • General registers: 32-bit x 16
  • Multiplier: 32-bit multiplier
  • Divider: Yes
  • Multiply-accumulator: Yes (two types: memory-to-memory operations and register-to-register operations)
  • Memory-protection unit (MPU)
Maximum operating frequency 100MHz
Power supply voltage 2.7 to 3.6V
Floating-point processing unit Single-precision floating-point processing unit
(Supports add/subtract/compare/multiply/divide and other instructions)
Program Flash Max. 512KB
Data Flash 32KB
SRAM Max. 96KB
On-chip peripheral functions
  • Direct memory access controller (DMAC) x 4 channels
  • Data transfer controller (DTC)
  • Direct memory access controller designed exclusively (EXDMAC)
    x 2 channels (Over 144-pin PKG Only)
  • 16-bit multifunction timer pulse unit (MTU2) x 12 channels
  • Port output enable
  • 16-bit compare match timer x 4 channels
  • 8-bit timer (TMR) x 4 channels
  • 4-bit Programmable pulse generator (PPG) x 2 channels (max)
  • 14-bit Independent watchdog timer (IWDT)
  • 8-bit Watchdog timer (WDT)
  • Realtime clock (RTC)
  • Serial communication interface (SCI) x 6 channels
  • I2C bus interface:Except 100-pin [2 channels], 100-pin [1channel]
  • Serial peripheral interface (RSPI) x 2 channels
  • SDRAM interface (max. 32-bit width; Over 144-pin PKG Only)
  • A/D converter (10-bit) x 8 channels [4 channels x 2 units] or (12-bit) x 8 channels [8 channels x 1 unit] (12-bit and 10-bit can not use at the same time.)
  • D/A converter (10-bit): Except 100-pin [2 channels], 100-pin [1channel]
  • USB2.0FullSpeed: 176-pin [2 channels, H/F/OTG], Except 176-pin [1channel, H/F/OTG]
  • CAN x 1 channel
  • CRC calculator
  • Low-speed on-chip oscillator (OCO)
  • Power-on reset circuit (POR)
  • Voltage detection circuit (LVD)
On-chip debugging function Yes (with trace function)
Low power consumption modes 4 modes
  • Sleep mode
  • All-module clock stop mode
  • Software standby mode
  • Deep software standby mode
Packages PLQP0100KB-A (100-pin LFQFP, 14 x 14mm 0.5mm pitch)
PLQP0144KA-A (144-pin LFQFP, 20 x 20mm 0.5mm pitch)
PLBG0176GA-A (176-pin LFBGA, 13 x 13mm 0.8mm pitch)
PTLG0085JA-A (85-pin TFLGA, 7 x 7mm 0.65mm pitch)
PTLG0145JB-A (145-pin TFLGA, 9 x 9mm 0.65mm pitch)

 

Pin Count / Memory Size Lineup:

RX62N, RX621-Pin Count/Memory Size

 

Block Diagram:

RX62N, RX621 Block Diagram

Below you will find information to support the development of your application.
You can find an explanation of orderable part numbers here.

Resources for Software and Hardware

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Video Watch videos related to this product.

 

Software Design Support

Title Description
CS+ An integrated development environment that can be used for coding, assembling/compiling, and simulation. (Also included with Renesas Starter Kits.)
e2 studio Renesas eclipse embedded studio, known as e² studio, is a complete development and debug environment based on the popular Eclipse CDT project.
E1 A standard Renesas on-chip debugging emulator that enables users to carry out ample debugging for real development at low cost. (Also included with starter kits.)
Renesas Starter Kit All the development tools you need for MCU evaluation and getting started. Also recommended for training.

 

Hardware Design Support

Title Description
IBIS/BSDL

IBIS standard simulation data is required for high-speed board design and can be used to run simulations to examine and troubleshoot issues such as waveform reflection, ringing, and so on, before producing the actual board.

BSDL is a data input format supported by most IEEE 1149.1 (JTAG)-compliant tools. The automatic test pattern generation (ATPG) and automatic test equipment functions of these tools facilitate testing.

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