Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | QSOP |
| Pkg. Code: | PCG28 |
| Lead Count (#): | 28 |
| Pkg. Dimensions (mm): | 9.9 x 3.8 x 1.47 |
| Pitch (mm): | 0.64 |
Environmental & Export Classifications
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Moisture Sensitivity Level (MSL) | 1 |
Product Attributes
| Pkg. Type | QSOP |
| Lead Count (#) | 28 |
| Pb (Lead) Free | Yes |
| Carrier Type | Tube |
| Advanced Features | Programmable Clock, Spread Spectrum, Reference Output |
| Core Voltage (V) | 3.3 |
| Input Freq (MHz) | 50 |
| Input Type | Crystal, LVCMOS |
| Inputs (#) | 1 |
| Length (mm) | 9.9 |
| MOQ | 48 |
| Moisture Sensitivity Level (MSL) | 1 |
| Output Banks (#) | 3 |
| Output Freq Range (MHz) | 0.25 - 133.33 |
| Output Skew (ps) | 150 |
| Output Type | LVCMOS |
| Output Voltage (V) | 2.5V, 3.3V |
| Outputs (#) | 3 |
| Package Area (mm²) | 37.6 |
| Pb Free Category | e3 Sn |
| Period Jitter Typ P-P (ps) | 200 |
| Pitch (mm) | 0.64 |
| Pkg. Dimensions (mm) | 9.9 x 3.8 x 1.47 |
| Prog. Clock | Yes |
| Prog. Interface | Serial |
| Published | No |
| Qty. per Carrier (#) | 48 |
| Qty. per Reel (#) | 0 |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1.47 |
| Width (mm) | 3.8 |
Resources for MK1716-01
Description
The MK1716-01 is a versatile serial programmable clock source which takes up very little board space. The device can simultaneously generate two groups of 4 output clocks and a reference clock output. Both clock groups (CLKA and CLKB) are derived from a single PLL, and have the ability to incorporate Spread Spectrum frequency modulation for reduced system EMI. Each group has control of independent PLL output divide values. Outputs may be programmed on the fly, and will lock to a new frequency in 10 ms or less. Each of the two groups are powered by a separate VDDIO voltage. The reference clock uses the fixed VDD voltage. VDDIO may vary from 2.5 V to VDD. The devices includes a OE pin which tri-states the output clocks and when tied low. IDT's VersaClockTM software allows the user to generate MK1716-01 device optimizing configuration code for target output frequencies and spread spectrum amounts.