Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG72 |
| Lead Count (#): | 72 |
| Pkg. Dimensions (mm): | 10.0 x 10.0 x 1.0 |
| Pitch (mm): | 0.5 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pkg. Type | VFQFPN |
| Lead Count (#) | 72 |
| Pb (Lead) Free | Yes |
| Carrier Type | Reel |
| Accepts Spread Spec Input | Yes |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, FBD |
| Chipset Manufacturer | Intel |
| Chipset Name | Seaburg, Tylersburg |
| Clock Spec. | DB1900GS |
| Core Voltage (V) | 3.3 |
| Diff. Input Signaling | HCSL |
| Diff. Output Signaling | HCSL |
| Input Freq (MHz) | 100 - 133.33 |
| Length (mm) | 10 |
| MOQ | 2500 |
| Moisture Sensitivity Level (MSL) | 3 |
| Multiplication Value | 1, 8, 12 |
| Multiply/Divide Value | 1, 8, 10, 12 |
| Output Banks (#) | 2 |
| Output Freq Range (MHz) | 66.67 - 400 |
| Output Skew (ps) | 150 |
| Output Voltage (V) | 0.8 |
| Outputs (#) | 4 |
| Package Area (mm²) | 100 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 10.0 x 10.0 x 1.0 |
| Platform Name | Cranberry Lake, Stoakley, Thurley |
| Qty. per Carrier (#) | 0 |
| Qty. per Reel (#) | 2500 |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | Yes |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1 |
| Width (mm) | 10 |
The IDT9FG1904B-1 follows the Intel DB1900GS Differential Buffer Specification, except for the output groupings. This buffer provides 19 output clocks for CPU Host Bus, PCI-Express, or Fully Buffered DIMM applications. The outputs are configured with two groups. Both groups, DIF_(14:0) and DIF_(18:15) can be equal to or have a gear ratio to the input clock. A differential CPU clock from a CK410B+ main clock generator, such as the IDT932S421, drives the IDT9FG1904B-1. The IDT9FG1904B-1 can provide outputs up to 400MHz.