Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PAG48 |
| Lead Count (#): | 48 |
| Pkg. Dimensions (mm): | 12.5 x 6.1 x 1.0 |
| Pitch (mm): | 0.5 |
Environmental & Export Classifications
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
Product Attributes
| Lead Count (#) | 48 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Power Consumption Typ (mW) | 587 |
| Qty. per Reel (#) | 1000 |
| Qty. per Carrier (#) | 0 |
| Package Area (mm²) | 76.3 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 12.5 x 6.1 x 1.0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | 0 to 70°C |
| Advanced Features | Spread Spectrum, Reference Output |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2 |
| Architecture | Common |
| C-C Jitter Max P-P (ps) | 50 |
| Core Voltage (V) | 3.3 |
| Diff. Output Signaling | HCSL |
| Diff. Outputs | 8 |
| Diff. Termination Resistors | 32 |
| Input Freq (MHz) | 14.318 - 14.318, 25 - 27 |
| Input Type | Crystal, LVCMOS |
| Length (mm) | 12.5 |
| MOQ | 1000 |
| Output Freq Range (MHz) | 100 - 400 |
| Output Skew (ps) | 50 |
| Output Type | HCSL, LVCMOS |
| Output Voltage (V) | 0.8V, 3.3V |
| Outputs (#) | 8 |
| PLL | Yes |
| Pkg. Type | TSSOP |
| Prog. Clock | No |
| Published | No |
| Reel Size (in) | 13 |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 1 |
| Width (mm) | 6.1 |
| Xtal Freq (MHz) | 14.318 - 14.318, 25 - 27 |
| Xtal Inputs (#) | 1 |
Resources for 9FG108
Description
9FG108 is a Synthesizer that provides 8 differential output pairs that are compliant to the Intel CK410 specification. It also provides support for PCI-Express, next generation I/O, and SATA. The part synthesizes several output frequencies from either a 14.31818 MHz crystal or a 25 MHz crystal. The device can also be driven by a reference input clock instead of a crystal. It provides outputs with cycle-to-cycle jitter of less than 50 ps and output-to-output skew of less than 65 ps.