Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | SSOP |
| Pkg. Code: | PVG48 |
| Lead Count (#): | 48 |
| Pkg. Dimensions (mm): | 15.9 x 7.5 x 2.3 |
| Pitch (mm): | 0.64 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 48 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 1000 |
| Qty. per Carrier (#) | 0 |
| Package Area (mm²) | 119.3 |
| Pitch (mm) | 0.64 |
| Pkg. Dimensions (mm) | 15.9 x 7.5 x 2.3 |
| Power Consumption Typ (mW) | 627 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Country of Assembly | TAIWAN |
| Country of Wafer Fabrication | SINGAPORE |
| Accepts Spread Spec Input | Yes |
| Advanced Features | HW PLL mode control |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2 |
| Architecture | Common |
| C-C Jitter Max P-P (ps) | 50 |
| Chipset Manufacturer | Intel |
| Chipset Name | DB800v2 |
| Core Voltage (V) | 3.3 |
| Diff. Input Signaling | HCSL |
| Diff. Inputs | 1 |
| Diff. Output Signaling | HCSL |
| Diff. Outputs | 8 |
| Diff. Termination Resistors | 32 |
| Feedback Input | No |
| Function | Zero Delay Buffer |
| Input Freq (MHz) | 100 |
| Input Type | HCSL |
| Inputs (#) | 1 |
| Length (mm) | 15.9 |
| MOQ | 1000 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 33.33 - 400 |
| Output Skew (ps) | 50 |
| Output Type | HCSL |
| Output Voltage (V) | 0.8 |
| Outputs (#) | 8 |
| PLL | Yes |
| Phase Jitter Max RMS (ps) | 0.1 |
| Pkg. Type | SSOP |
| Product Category | PCI Express Clocks |
| Prog. Clock | No |
| Prog. Interface | SMBUS |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 2.3 |
| Width (mm) | 7.5 |
The 9DB803 is compatible with the Intel DB800v2 Differential Buffer Specification. This buffer provides 8 PCI Express Gen2 clocks. The 9DB803 is driven by a differential output pair from a CK410B+, CK505 or CK509B main clock generator.