Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | SSOP |
| Pkg. Code: | PVG48 |
| Lead Count (#): | 48 |
| Pkg. Dimensions (mm): | 15.9 x 7.5 x 2.3 |
| Pitch (mm): | 0.64 |
Environmental & Export Classifications
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 1 |
| ECCN (US) | |
| HTS (US) |
Product Attributes
| Pkg. Type | SSOP |
| Lead Count (#) | 48 |
| Pb (Lead) Free | Yes |
| Carrier Type | Reel |
| C-C Jitter Max P-P (ps) | 150 |
| Chipset Manufacturer | Intel |
| Clock Spec. | CK408 |
| Core Voltage (V) | 3.3 |
| Feedback Input | No |
| Function | Clock Generator |
| Input Freq (MHz) | 14.318 - 14.318 |
| Input Type | Crystal |
| Inputs (#) | 1 |
| Length (mm) | 15.9 |
| MOQ | 1000 |
| Moisture Sensitivity Level (MSL) | 1 |
| Output Banks (#) | 6 |
| Output Freq Range (MHz) | 14.318 - 200 |
| Output Skew (ps) | 100 |
| Output Voltage (V) | 3.3 |
| Package Area (mm²) | 119.3 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 0.64 |
| Pkg. Dimensions (mm) | 15.9 x 7.5 x 2.3 |
| Prog. Clock | Yes |
| Prog. Interface | I2C |
| Published | No |
| Qty. per Carrier (#) | 0 |
| Qty. per Reel (#) | 1000 |
| Reel Size (in) | 13 |
| Reference Output | Yes |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Tape & Reel | Yes |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 2.3 |
| Width (mm) | 7.5 |
Resources for 950202
Description
The 950202 is a single chip clock solution for desktop designs using the Intel 845 chipset with PC133 or DDR memory. It provides all necessary clock signals for such a system. The 950202 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). This part incorporates ICS's newest clock technology which offers more robust features and functionality. Employing the use of a serially programmable I2C interface, this device can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each individual output clock. M/N control can configure output frequency with resolution up to 0.1MHz increment.