Renesas’ Timing product portfolio has been acquired by SiTime.
Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.
| CAD Model: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | NLG32 |
| Lead Count (#): | 32 |
| Pkg. Dimensions (mm): | 5.0 x 5.0 x 0.9 |
| Pitch (mm): | 0.5 |
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 32 |
| Carrier Type | Tray |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 490 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Assembly Location | CHINA |
| Wafer Fab Location | AUSTRIA |
| Additive Phase Jitter Typ RMS (fs) | 47 |
| Additive Phase Jitter Typ RMS (ps) | 0.047 |
| Adjustable Phase | No |
| Channels (#) | 1 |
| Core Voltage (V) | 2.5V, 3.3V |
| Function | Buffer, Multiplexer |
| Input Freq (MHz) | 3200 |
| Input Type | CML, LVDS, LVPECL |
| Inputs (#) | 2 |
| Length (mm) | 5 |
| MOQ | 490 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 3200 |
| Output Skew (ps) | 45 |
| Output Type | LVPECL |
| Output Voltage (V) | 2.5V, 3.3V |
| Outputs (#) | 6 |
| Package Area (mm²) | 25 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 5.0 x 5.0 x 0.9 |
| Pkg. Type | VFQFPN |
| Product Category | Clock Buffers & Drivers, Clock Multiplexers, RF Buffers |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 2.5 - 2.5, 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 0.9 |
| Width (mm) | 5 |
The 8S58035I is a high-speed 2-to-6 Differential-to-LVPECL fanout buffer. The 8S58035I is optimized for high-speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fiber Channel. The internally terminated differential inputs and VREF_AC pins allow other differential signal families such as LVDS, LVDS, and CML to be easily interfaced to the input with minimal use of external components. The device also has a 2:1 MUX input, allowing for easy selection between two clock reference sources. The 8S58035I is packaged in a small 5mm x 5mm 32-pin VFQFN package which makes it ideal for use in space-constrained applications.