Skip to main content
Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to [email protected]. Full transition to SiTime is expected by late 2026.

LVCMOS/LVTTL Clock Divider

Package Information

CAD Model:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PGG16
Lead Count (#):16
Pkg. Dimensions (mm):5.0 x 4.4 x 1.0
Pitch (mm):0.65

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)16
Carrier TypeTube
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Qty. per Carrier (#)96
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)0 to 70°C
Core Voltage (V)2.5V, 3.3V
Divider Value1, 2, 3, 4, 5, 6, 8, 16
FunctionMultiplexer, Divider
Input Freq (MHz)250
Input TypeLVCMOS
Inputs (#)2
Length (mm)5
MOQ96
Output Banks (#)1
Output Freq Range (MHz)250
Output TypeLVCMOS
Output Voltage (V)1.8V, 2.5V, 3.3V
Outputs (#)1
Package Area (mm²)22
Pitch (mm)0.65
Pkg. Dimensions (mm)5.0 x 4.4 x 1.0
Pkg. TypeTSSOP
Product CategoryClock Dividers, Clock Multiplexers
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)1
Width (mm)4.4

Description

The ICS87001-01 is a low skew, ÷1, ÷2, ÷3, ÷4, ÷5, ÷6, ÷8, ÷16 LVCMOS/LVTTL Fanout Buffer/Divider. The ICS87001-01 has selectable clock inputs that accept single ended input levels. Output enable pin controls whether the output is in the active or high impedance state. The ICS87001-01 is characterized at 3.3V, 2.5V and mixed 3.3V/2.5V, 3.3V/1.8V, 2.5V/1.8V input/output supply operating modes.Guaranteed part-to-part skew characteristics make the ICS87001-01 ideal for those applications demanding well defined performance and repeatability.