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Low Skew 1-to-4 Differential to LVPECL Fanout Buffer

Package Information

Pkg. Type:TSSOP
Pkg. Code:PGG20
Lead Count (#):20
Pkg. Dimensions (mm):6.5 x 4.4 x 1.0
Pitch (mm):0.65

Environmental & Export Classifications

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)1
ECCN (US)
HTS (US)

Product Attributes

Pkg. TypeTSSOP
Lead Count (#)20
Pb (Lead) FreeYes
Carrier TypeTube
Additive Phase Jitter Typ RMS (fs)92
Additive Phase Jitter Typ RMS (ps)0.092
Core Voltage (V)3.3V, 2.5V
FunctionBuffer, Multiplexer
Input Freq (MHz)2700
Input TypeLVPECL, ECL, HSTL
Inputs (#)2
Length (mm)6.5
MOQ74
Moisture Sensitivity Level (MSL)1
Output Banks (#)1
Output Freq Range (MHz)2700
Output SignalingLVPECL, ECL
Output Skew (ps)50
Output TypeLVPECL, ECL
Output Voltage (V)3.3V, 2.5V
Outputs (#)4
Package Area (mm²)28.6
Pb Free Categorye3 Sn
Pitch (mm)0.65
Pkg. Dimensions (mm)6.5 x 4.4 x 1.0
Qty. per Carrier (#)74
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Temp. Range (°C)-40 to 85°C
Thickness (mm)1
Width (mm)4.4

Description

The 853S314I is a low skew 1-to-4 Differential Fanout Buffer, designed with clock distribution in mind, accepting two clock sources into an input MUX. The MUX is controlled by a CLK_SEL pin. This makes the 853S314I very versatile, in that, it can operate as both a differential clock buffer as well as a signal-level translator and fanout buffer. The device is designed on a SiGe process and can operate at frequencies in excess of 2.7GHz. This ensures negligible jitter introduction to the timing budget which makes it an ideal choice for distributing high frequency, high precision clocks across back planes and boards in communication systems. Internal temperature compensation guarantees consistent performance across various platforms.