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Low Skew,1-to-4 Differential-to-HSTL Fanout Buffer

Package Information

CAD Model:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PGG20
Lead Count (#):20
Pkg. Dimensions (mm):6.5 x 4.4 x 1.0
Pitch (mm):0.65

Environmental & Export Classifications

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

Product Attributes

Lead Count (#)20
Carrier TypeReel
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)3000
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Additive Phase Jitter Typ RMS (fs)82
Additive Phase Jitter Typ RMS (ps)0.082
Core Voltage (V)3.3
FunctionBuffer, Multiplexer
Input Freq (MHz)650
Input TypeCML, HCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#)2
Length (mm)6.5
MOQ3000
Output Banks (#)1
Output Freq Range (MHz)650
Output Skew (ps)50
Output TypeHSTL
Output Voltage (V)1.8
Outputs (#)4
Package Area (mm²)28.6
Pitch (mm)0.65
Pkg. Dimensions (mm)6.5 x 4.4 x 1.0
Pkg. TypeTSSOP
PublishedNo
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Thickness (mm)1
Width (mm)4.4

Description

The 8523I is a low skew, high performance 1-to-4 Differential-to-HSTL Fanout Buffer. The 8523I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8523I ideal for those applications demanding well defined performance and repeatability.