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Renesas Electronics Corporation

Renesas’ Timing product portfolio has been acquired by SiTime.

Datasheets, documentation, and sample orders remain available on Renesas.com through late 2026. For new designs, purchasing, support, and product inquiries, visit SiTime.com or send an email to SalesClocks@sitime.com. Full transition to SiTime is expected by late 2026.

1-to-10 LVCMOS/LVTTL Fanout Buffer

Package Information

CAD Model:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PAG48
Lead Count (#):48
Pkg. Dimensions (mm):12.5 x 6.1 x 1.0
Pitch (mm):0.5

Environmental & Export Classifications

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)1
ECCN (US)
HTS (US)

Product Attributes

Pkg. TypeTSSOP
Lead Count (#)48
Pb (Lead) FreeYes
Carrier TypeTube
Core Voltage (V)2.5
FunctionBuffer
Input Freq (MHz)200
Input TypeLVCMOS, LVTTL
Inputs (#)1
Length (mm)12.5
MOQ156
Moisture Sensitivity Level (MSL)1
Output Banks (#)2
Output Freq Range (MHz)200
Output SignalingLVCMOS
Output Skew (ps)25
Output TypeLVCMOS
Output Voltage (V)2.5V, 1.8V, 1.5V
Outputs (#)10
Package Area (mm²)76.3
Pb Free Categorye3 Sn
Pitch (mm)0.5
Pkg. Dimensions (mm)12.5 x 6.1 x 1.0
Qty. per Carrier (#)39
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Temp. Range (°C)-40 to 85°C
Thickness (mm)1
Width (mm)6.1

Description

The 5T9070 2.5V single data rate (SDR) clock buffer is a single-ended input to ten single-ended outputs buffer built on advanced metal CMOS technology. The SDR clock buffer fanout from a single input to ten single-ended outputs reduces the loading on the preceding driver and provides an efficient clock distribution network. The 5T9070 has two output banks that can be asynchronously enabled/ disabled. Multiple power and grounds reduce noise.