Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | SOIC |
| Pkg. Code: | DC16 |
| Lead Count (#): | 16 |
| Pkg. Dimensions (mm): | 9.9 x 3.9 x 1.5 |
| Pitch (mm): | 1.27 |
Environmental & Export Classifications
| Pb (Lead) Free | No |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Moisture Sensitivity Level (MSL) | 1 |
Product Attributes
| Pkg. Type | SOIC |
| Lead Count (#) | 16 |
| Pb (Lead) Free | No |
| Carrier Type | Tube |
| Advanced Features | Programmable Clock, Feedback Input |
| Chipset Manufacturer | Brooktree |
| Core Voltage (V) | 5 |
| Feedback Input | Yes |
| Input Freq (MHz) | 20 |
| Input Type | Crystal |
| Inputs (#) | 1 |
| Length (mm) | 9.9 |
| MOQ | 48 |
| Moisture Sensitivity Level (MSL) | 1 |
| Output Banks (#) | 3 |
| Output Freq Range (MHz) | 260 |
| Output Type | LVCMOS |
| Output Voltage (V) | 5 |
| Outputs (#) | 3 |
| Package Area (mm²) | 38.6 |
| Pb Free Category | e0 |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 9.9 x 3.9 x 1.5 |
| Prog. Clock | Yes |
| Prog. Interface | Serial |
| Published | No |
| Qty. per Carrier (#) | 48 |
| Qty. per Reel (#) | 0 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 1.5 |
| Width (mm) | 3.9 |
Resources for 1562B
Description
The 1562B is a very high performance monolithic phaselocked loop (PLL) frequency synthesizer. Utilizing ICS's advanced CMOS mixed-mode technology, the 1562B provides a low cost solution for high-end video clock generation. The 1562B has differential video clock outputs (CLK+ and CLK-) that are compatible with industry standard video DAC. Another clock output, LOAD, is provided whose frequency is derived from the main clock by a programmable divider. An additional clock output is available, LD/N2, which is derived from the LOAD frequency and whose modulus may also be programmed. Operating frequencies are fully programmable with direct control provided for reference divider, prescaler, feedback divider and post-scaler. Reset of the pipeline delay on Brooktree RAMDAC?s may be performed under register control. Outputs may also be set to desired states to facilitate circuit board testing.