The RMLV1616A-U Series is a family of 16-Mbit asynchronous SRAMs organized 1,048,576-word × 16-bit.

The RMLV1616A-U Series has realized higher soft error immunity compared to typical SRAMs with on-chip ECC, archived by Renesas’s unique Advanced LPSRAM technologies. Therefore, it is suitable for battery backup systems.

It is offered in 48pin TSOP (I) or 48-ball fine pitch ball grid array.


  • Ultra-low standby current consumption:
    - ~25°C: 0.5μA (typ.)/3μA (max.)
    - ~85°C: 4.5μA (typ.)/8μA (max.)
  • High speed access time: 45ns/55ns (max.)
  • Higher soft error immunity (< 0.04 FIT/Mb)*1 compared to typical SRAMs with on-chip ECC
  • Single 3V supply: 2.7V to 3.6V
  • Organized 1,048,576-word × 16-bit (48pin TSOP (I) also configurable as 2,097,152-word × 8bit)
  • Easy memory expansion by CS1# and CS2
  • No clocks, No refresh
  • Common data input and output
    - Three state output
  • Directly TTL compatible
    - All inputs and outputs
  • Battery backup operation
  • Available in Pb-free and RoHS applicable package

Note *1. Based on an accelerated test that complies with JEDEC standard JESD89A. Contact us for details.




Type Title Date
Datasheet PDF 331 KB 日本語
Guide PDF 2.00 MB 日本語
Guide PDF 182 KB 日本語
Guide PDF 471 KB 日本語
Product Reliability Report PDF 197 KB
Guide PDF 1.27 MB 日本語
Package Outline Drawing PDF 60 KB
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Design & Development