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8SLVP2104I

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Product Longevity: 2040

Dual 1:4, 3.3V, 2.5V LVPECL Output Fanout Buffer

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Features

  • Two 1:4, low skew, low additive jitter LVPECL output pairs
  • Two differential clock input pairs
  • Differential pairs can accept the following differential input levels: LVDS, LVPECL, CML
  • Maximum input clock frequency: 2GHz
  • Output skew: 8ps (typical)
  • Propagation delay: 270ps (maximum)
  • Low additive phase jitter, RMS: 47fs (maximum)
  • Full 3.3V and 2.5V supply voltage
  • Maximum device current consumption (IEE): 88mA (maximum)
  • Available in lead-free (RoHS 6), 28-Lead VFQFN package
  • -40°C to 85°C ambient operating temperature
  • Supports case temperature ≤105°C operations
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8SLVP2104I - Block Diagram
8SLVP2104I - Pinout
8SLVP2104I - Block Diagram
8SLVP2104I - Pinout

Description

The 8SLVP2104I is a high-performance differential dual LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVP2104I is characterized to operate from a 3.3V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVP2104I ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and four low skew outputs are available. The integrated bias voltage reference enable easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.

Parameters

Attributes Value
Outputs (#) 8
Inputs (#) 2
Channels (#) 2
Input Freq (MHz) 2000
Output Freq Range (MHz) 2000
Output Skew (ps) 25
Adjustable Phase No
Noise Floor (dBc/Hz) -162
Additive Phase Jitter Typ RMS (fs) 43
Output Type LVPECL
Supply Voltage (V) 2.5 - 2.5, 3.3 - 3.3
Advanced Features Dual Buffer
105°C Max. Case Temp. 1

Package Options

Pkg. Type Pkg. Dimensions (mm) Lead Count (#) Pitch (mm)
VFQFPN 5.0 x 5.0 x 0.8 28 0.5

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Overview of IDT's 8LSVP (LVPECL) and 8SLVD (LVDS) families of low-jitter fanout buffers from IDT. Fanout buffers are a useful building block of many clock trees, providing signal buffering and multiple low-skew copies of the input signal. IDT's high-performance, low additive phase noise, differential clock fan-out buffers offer up to 2 GHz clock operation, low additive phase jitter (12kHz - 20MHz) of 50 to 100 femtoseconds RMS max, fast output rise & fall times (less than 150ps), and single and dual channel functions (dual: matched propagation delay). Presented by Baljit Chandhoke, Product Marketing Manager at Integrated Device Technology, Inc. To learn more about IDT's industry-leading portfolio of fanout buffers, visit Renesas's RF Buffer page.

 

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