This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of high junction temperature like applying over power consumption, over current etc. .

Features

  • Logic level operation (3 V Gate drive).
  • Built-in the over temperature shut-down circuit.
  • High endurance capability against to the short circuit.
  • Hysteresis type shut down operation.
  • High density mounting.
  • Built-in the current limitation circuit.
  • Power supply voltage applies 12 V.
  • AEC-Q101compliant.

Product Options

Part Number Part Status Pkg. Type Carrier Type Buy Sample
RJE0617JSP-00#J0
Active SOP Embossed Tape
Availability

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
–60V, –1.5A, P Channel Thermal FET Power Switching (R07DS1070EJ0500) Datasheet PDF 316 KB
Application Notes & White Papers
Power MOS FET APPLICATION NOTE 日本語 Application Note PDF 814 KB
PCNs & PDNs
Unification of a JEDEC tray and a embossed carrier tape for LQFP package (Additional Information & Correction) 日本語 Product Change Notice PDF 4.86 MB
Unification of a JEDEC tray and a embossed carrier tape for LQFP package ( PC-WRP-A001B/E ) 日本語 Product Change Notice PDF 3.74 MB
Unification of a JEDEC tray and a embossed carrier tape for LQFP package ( PC-WRP-A001A/E ) 日本語 Product Change Notice PDF 1.46 MB
Other
Product Scout Automotive Brochure PDF 3.25 MB
PowerMOSFET & IPD Brochure PDF 2.24 MB
Renesas Semiconductor Lead-Free Packages Brochure PDF 1.32 MB