Overview
Description
Features
- Lead-free packaging (Pb-free)
- Low jitter (typical 27 ps short term jitter)
- Wide input frequency range
- 8 kHz to 100 MHz
- LVCMOS single-ended clock outputs
- Up to 110 MHz
- Uses 3.3 V power supply
- 5 Volt tolerant Inputs (HSYNC, VSYNC)
- Coast (ignore HSYNC) capability via VSYNC pin
- Industry standard I2C-bus programming interface
- PLL Lock detection via I2C or LOCK output pin
- 16-pin TSSOP package
Comparison
Applications
Design & Development
Support
Support Communities
Support Communities
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RA and Synergy are the same chip?
Hello All, Datasheets of "Renesas RA2A1 Group" and "S1JA Microcontroller Group" look the same.Does the product name change due to the difference in software licensing fees only? Thank you,
Oct 19, 2019 -
RTOS Sample code for RX231
I am trying to get the RX231_FreeRTOS_pkg to compile in eStudio 7.6. I have successfully updated the project and it compiles but the linker stage is failing. I am getting the following errors: E0562310:Undefined external symbol "_write" referenced in "fflush"E0562310:Undefined external symbol "_R_SCI ...
Oct 23, 2019 -
RTOS Sample code for RX231
I am trying to get the RX231_FreeRTOS_pkg to compile in eStudio 7.6. I have successfully updated the project and it compiles but the linker stage is failing. I am getting the following errors: E0562310:Undefined external symbol "_write" referenced in "fflush"E0562310:Undefined external symbol "_R_SCI ...
Oct 23, 2019
FAQs
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RZ/V: Inference execution with DRP-AI
... operate with the DRP-AI. For the sequence flow, refer to the documents provided with the DRP-AI Support Package. DRP-AI Translator can be downloaded from the Renesas website. https://www.renesas.com/document/swo/drp-ai-translator-v160?language=en&r=1526446
Feb 22, 2022