The V850E/Sx3-H are 32-bit single-chip microcontrollers that include the V850E1 CPU core and peripheral functions such as ROM/RAM, a timer/counter, serial interfaces, an A/D converter, and a D/A converter. The V850E/Sx3-H include an IEBusTM (Inter Equipment BusTM) controller for the automotive LAN, and some of the models also include a CAN (Controller Area Network) controller and enable extremely high cost performance for automotive use multimedia equipment such as car audio systems.


Main Solutions

Key Features:

  • Operating voltage: 2.85 - 3.6 V
  • Max. frequency: 48 MHz
  • ROM capacities: 512 to 1536 KB flash memory
  • RAM capacities: 60/60 + 16/60 + 32 KB, 60 + 16/60 + 32 KB
  • Package: 144-pin plastic LQFP (20 x 20), 176-pin plastic LQFP (fine pitch) (24 x 24)
  • Minimum instruction execution time: 20.8 ns (operating with main clock (fXX) of 48 MHz)
  • General-purpose registers: 32 bits x 32 registers
  • CPU features:
    • Signed multiplication (16 x 16 -> 32): 1 to 2 clocks
    • Signed multiplication (32 x 32 -> 64): 1 to 2 clocks
    • Saturated operations (overflow and underflow detection functions included)
    • 32-bit shift instruction: 1 clock
    • bit manipulation instructions
    • Load/store instructions with long/short format
  • Memory space: 64 MB of linear address space (for programs and data), External expansion: Up to 28 MB
    • External bus interface: Separate bus/multiplexed bus output selectable, 8/16 bit data bus sizing function
    • Wait function: Programmable Wait function, External Wait function
    • Idle state function
    • bus hold function
  • Interrupts and exceptions:
    • Non-maskable interrupts: 2 sources
    • Maskable interrupts: 98/102/104/106/108/112 sources
    • Software exceptions: 32 sources
    • Exception trap: 2 sources
  • I/O ports: 128/156
  • Timer function:
    • 16-bit interval timer M (TMM): 3 channel
    • 16-bit timer/event counter P (TMP): 9 channels
    • 16-bit timer/event counter Q (TMQ): 1 channel
    • Watch timer: 1 channel
    • Real-time counter: 1 channel
    • Watchdog timer: 1 channel
  • Real-time output: 6-bit x 2 channels
  • Serial interface:
    • Asynchronous serial interface A (UARTA): 6 channels
    • Asynchronous serial interface B (UARTB): 2 channels
    • 3-wire variable-length serial interface B (CSIB): 6 channels
    • 3-wire variable-length serial interface E (CSIE): 2 channels
    • I2C bus interface (I2C): 6 channels
    • IEBus controller: 1 channel
    • CAN controller: 1/2 channel
  • A/D converter: 10-bit resolution: 16 channels
  • D/A converter: 8-bit resolution: 2 channels
  • DMA controller: 4 channels
  • CRC function
  • On-chip debug function
  • ROM correction: 8 correction addresses specifiable
  • Clock generator:
    • During main clock or subclock operation
    • 7-level CPU clock (fXX, fXX/2, fXX/4, fXX/8, fXX/16, fXX/32, fXT)
    • clock-through mode/PLL mode/SSCG mode selectable
  • Internal oscillation clock: 220 kHz (TYP.)
  • Power-save functions: HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode


Pin count – Memory size Lineup:

Program Flash

Below you will find information to support the development of your application.
You can find an explanation of orderable part numbers here.

Resources for Software and Hardware

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Software Design Support

Title Description
CS+ An integrated development environment that can be used for coding, assembling/compiling, and simulation. (Also included with Renesas Starter Kits.)
E1 A standard Renesas on-chip debugging emulator that enables users to carry out ample debugging for real development at low cost. (Also included with starter kits.)
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