Overview

Description

The 9FGV0441 is an 4-output very low power clock generator for PCIe Gen1–4 applications with integrated output terminations providing Zo = 100Ω. The device has 4 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.

Features

  • Integrated terminations provide 100Ω differential Zo; reduced component count and board space
  • 1.8V operation; reduced power consumption
  • OE# pins; support DIF power management
  • LP-HCSL differential clock outputs; reduced power and board space
  • Programmable slew rate for each output; allows tuning for various line lengths
  • Programmable output amplitude; allows tuning for various application environments
  • DIF outputs blocked until PLL is locked; clean system start-up
  • Selectable 0%, -0.25% or -0.5% spread on DIF outputs; reduces EMI
  • External 25MHz crystal; supports tight ppm with 0 ppm synthesis error
  • Configuration can be accomplished with strapping pins; SMBus interface not required for device control
  • 3.3V tolerant SMBus interface works with legacy controllers
  • Space saving 5 x 5 mm 32-VFQFPN; minimal board space
  • Selectable SMBus addresses; multiple devices can easily share an SMBus segment

Applications

Documentation

Title Type Date
PDF580 KB
Datasheet
PDF1.99 MB
Application Note
PDF255 KB
Application Note
PDF307 KB
Application Note
PDF480 KB
Application Note
PDF235 KB
Application Note
PDF1.90 MB
Application Note
PDF495 KB
Application Note
PDF442 KB
Application Note
PDF233 KB
Application Note
PDF160 KB
Application Note
PDF120 KB
Application Note
PDF565 KB
Application Note
PDF136 KB
Application Note
PDF121 KB
Application Note
PDF321 KB 简体中文
Guide
PDF2.40 MB
Overview
PDF1.83 MB
Overview
PDF728 KB
Product Change Notice
PDF983 KB
Product Change Notice
PDF583 KB
Product Change Notice
PDF596 KB
Product Change Notice
PDF544 KB
Product Change Notice

Design & Development

Models

Support