Overview

Description

The 8A34001 System Synchronizer for IEEE 1588 generates ultra-low jitter; precision timing signals based on the IEEE 1588 Precision Time Protocol (PTP) and Synchronous Ethernet (SyncE).  The device can be used as a single timing and synchronization source for a system or two of them can be used as a redundant pair for improved system reliability. Digitally Controlled Oscillators (DCOs) are available to be controlled by IEEE 1588 clock recovery servo software running on an external processor. The device supports physical layer timing with Digital PLLs (DPLLs) and other timing blocks necessary to implement a Synchronous Equipment Timing Source (SETS) for SyncE. The DCOs can be controlled using IEEE 1588 information alone, or they can combine IEEE 1588 time information with physical layer frequency information from SyncE in accordance with ITU-T G.8273.2. The device can be used to actively measure and compensate for clock propagation delays across backplanes and across circuit boards to ensure the distribution of accurate time and phase with minimal time error between IEEE 1588 Time Stamp Units (TSUs) in a system. The device supports multiple independent channels that control: IEEE 1588 clock synthesis; SyncE clock generation; jitter attenuation and universal frequency translation.  Input-to-input, input-to-output and output-to-output phase skew can all be precisely managed.  The device outputs ultra-low-jitter clocks that can directly synchronize SERDES running at up to 28Gbps; as well as CPRI/OBSAI, SONET/SDH and PDH interfaces and IEEE 1588 TSUs.

To see other devices in this product family, visit the ClockMatrix Timing Solutions page.
To easily implement synchronization in IEEE 1588 systems, Renesas offers PTP Clock Manager Software for free under license.

Features

  • Eight independent timing channels
  • Jitter output below 150fs RMS (typical)
  • Digital PLLs (DPLLs) lock to any frequency from 0.5Hz to 1GHz
  • DPLLs / Digitally Controlled Oscillators (DCOs) generate any frequency from 0.5Hz to 1GHz
  • DCO outputs can be aligned in phase and frequency with the outputs of any DPLL or DCO
  • DPLLs comply with ITU-T G.8262 for Synchronous Ethernet (SyncE)
  • IEEE 1588 Support:
    • DCOs can be controlled by external IEEE 1588 software to synthesize Precision Time Protocol (PTP) / IEEE 1588 clocks with frequency resolution less than 1.11x10-16
    • Combo Bus simplifies compliance with ITU-T G.8273.2
    • Precise (1ps) resolution for phase measurement and control
    • All outputs/inputs can be configured to decode/encode PWM clock signals
    • PWM can be used to transmit and receive embedded frame and sync pulses; as well as Time of Day (ToD) and other data
  • Device requires a crystal oscillator or fundamental-mode crystal: 25MHz to 54MHz
  • Optional XO_DPLL input allows a wider range for XO, TCXO or OCXO frequencies from 1MHz to 150MHz for applications that require a local oscillator with high stability
  • Serial processor ports support 1MHz I2C or 50MHz SPI

Applications

Documentation

Title Type Date
PDF2.34 MB
Datasheet
PDF1.92 MB
Application Note
PDF2.13 MB
Application Note
PDF2.48 MB
Application Note
PDF393 KB
Application Note
PDF556 KB
Application Note
PDF231 KB
Application Note
PDF349 KB
Application Note
PDF1.62 MB
Application Note
PDF354 KB
Application Note
PDF563 KB
Application Note
PDF148 KB
Application Note
PDF390 KB
Application Note
PDF880 KB
Application Note
PDF584 KB
Application Note
PDF162 KB
Application Note
PDF739 KB
Application Note
PDF633 KB
Application Note
PDF479 KB
Application Note
PDF442 KB
Application Note
PDF566 KB
Application Note
PDF976 KB
Application Note
PDF659 KB
Application Note
PDF324 KB
Application Note
PDF38 KB
Device Errata
PDF1.88 MB
Guide
PDF10.53 MB
Guide
PDF2.35 MB
Guide
PDF213 KB
Guide
PDF143 KB
Guide
PDF2.35 MB
Guide
PDF2.67 MB
Manual - Hardware
XLSX321 KB
Other
PDF320 KB
Overview
PDF1.83 MB
Overview
PDF135 KB
Product Change Notice
PDF113 KB
Product Change Notice
PDF301 KB
Product Change Notice
PDF123 KB
Product Change Notice
PDF435 KB
Product Change Notice
PDF103 KB
Release Note
PDF6.54 MB
Report
PDF288 KB
Schematic
PDF400 KB
White Paper

Design & Development

Software & Tools

Software & Tools

Title Type Company
PTP Clock Manager for LinuxSupports IEEE 1588 and Synchronous Ethernet communication requirements. PTP Clock Manager features a clock servo and Packet Delay Variation (PDV) filter to meet the needs for G.8275.1 and G.8275.2 standards from the ITU-T.Downloads: Protocol Stack Renesas

Software Downloads

Title Type Date
ZIP50.80 MB
Software & Tools - Other
ZIP49.30 MB
Software & Tools - Other
ZIP18.02 MB
Software & Tools - Other
ZIP278 KB
Software & Tools - Other
ZIP73 KB
Software & Tools - Other
ZIP177 KB
Software & Tools - Other
ZIP177 KB
Software & Tools - Other
GZ532 KB
Software & Tools - Software
ZIP615 KB
Software & Tools - Software

Boards & Kits

Boards & Kits

Models

Models

Title Type Date
ZIP2 KB
Model - BSDL
ZIP3 KB
Model - BSDL
ZIP2.55 MB
Model - IBIS

Videos & Training

IDT ClockMatrix™ Timing Solution for 100Gbps Interface Speeds (IEEE 1588, OTN, and SyncE)

Introducing the IDT ClockMatrix™ family of devices - high-performance, precision timing solutions designed to simplify clock designs for applications with up to 100 Gbps interface speeds. 

They can be used anywhere in a system to perform critical timing functions, such as clock generation, frequency translation, jitter attenuation and phase alignment. A range of devices in the family support BBU, OTN, SyncE, synthesizer and jitter attenuator applications with several density options for each.

For more information, visit www.idt.com/clockmatrix.