特長
- Two differential inputs support LVPECL, LVDS, HCSL or LVCMOS reference clocks
- Select which of the two input clocks is to be used as the reference clock for which divider via pin or register selection
- Generates eight differential outputs or eight LVCMOS outputs, LVCMOS on Bank A only
- Outputs arranged in 2 banks of 4 outputs each
- Output enable control pin
- Register programmable via I2C / SPI serial port
- Core voltage supply of 3.3V, 2.5V or 1.8V
- -40°C to +85°C ambient operating temperature
- Lead-free (RoHS 6) packaging
説明
The device is intended to take 1 or 2 reference clocks, select between them, using a pin or register selection and generate up to 8 outputs that may be the same as the reference frequency or integer-divider versions of it.
The 8P79818 supports two output banks, each with its own divider and power supply. All outputs in one bank would generate the same output frequency, but each output can be individually controlled for output type, output enable or even powered-off.
The device supports a serial port for configuration of the parameters while in operation. The serial port can be selected to use the I2C or SPI protocol. After power-up, all outputs will come up in LVDS mode and may be programmed to other configurations over the serial port. Outputs may be enabled or disabled under control of the OE input pin.
The device can operate over the -40°C to +85°C temperature range.
パラメータ
| 属性 | 値 |
|---|---|
| Temp. Range (°C) | -40 to 85°C |
| Product Category | Clock Buffers & Drivers, Clock Dividers, RF Buffers |
パッケージオプション
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| VFQFPN | 5.0 x 5.0 x 0.9 | 32 | 0.5 |
