パッケージ情報
| CADモデル: | View CAD Model |
| Pkg. Type: | DIE |
| Pkg. Code: | |
| Lead Count (#): | |
| Pkg. Dimensions (mm): | |
| Pitch (mm): |
環境及び輸出分類情報
| Moisture Sensitivity Level (MSL) | |
| Pb (Lead) Free | No |
| ECCN (US) | 9A515.e.1 |
| HTS (US) | 8542.39.0090 |
製品スペック
| Pkg. Type | DIE |
| Pb (Lead) Free | No |
| MOQ | 5 |
| Temp. Range (°C) | -55 to +125°C |
| CAGE code | 34371 |
| Control Mode | Voltage, Peak Current Mode |
| Die Sale Availability? | Yes |
| Duty Cycle (Max) (%) | 100 |
| Flow | RH Hermetic |
| Models Available | iSIM |
| No-Load Operating Current | 25 |
| Operating Freq (Max) (MHz) | 0.5 |
| Outputs (#) | 2 |
| PROTO Availability? | Yes |
| Phase of Outputs | In Phase |
| Phases (Max) | 2 |
| Qualification Level | EM |
| Quiescent Current | 55µA |
| Rating | Space |
| Supply Voltage (max) (V) | 30 - 30 |
| Supply Voltage (min) (V) | 12 - 12 |
| Switching Frequency (max) (kHz) | 3000 |
| Switching Frequency (min) (kHz) | 10 |
| TID HDR (krad(Si)) | 300 |
| Topology | Boost, Flyback, Forward, Full Bridge, Half Bridge, Push-Pull |
| UVLO Rising (V) | 8.6 |
| VDD1 (V) | 12 - 20 |
| VREF (V) | 5.1 |
| VREF Output | Yes |
ISL71823ASRH に関するリソース
説明
The IS-1825ASRH, IS-1825BSRH, IS-1825BSEH, ISL71823ASRH, and ISL71823BSRH are single event and total dose hardened pulse width modulators designed to be used in high-frequency switching power supplies in either voltage or current-mode configurations. These devices include a precision voltage reference, a low power start-up circuit, a high-frequency oscillator, a wide-band error amplifier, and a fast current-limit comparator. The IS-1825xSRH and IS-1825xSEH feature dual, alternating output operating from zero to less than 50% duty cycle, and the ISL71823xSRH features dual in-phase output operating from zero to less than 100% duty cycle. The B versions of the parts test the delay from clock out to PWM output switching after power has been applied to the modulator (tPWM). The SEH parts are wafer-by-wafer acceptance tested to 50krad(Si) at a low dose rate of <10mrad(Si)/s. Constructed with the Rad Hard Silicon Gate (RSG) dielectrically isolated BiCMOS process, these devices are immune to single-event latch-up and have been specifically designed to provide a high level of immunity to single-event transients. All specified parameters are established and tested for 300krad(Si) total dose performance. The devices are offered in a 16 Ld CDIP or a 20 Ld CDFP and fully specified to across the temperature range of -50 °C to +125 °C.