特長
- 14-bit pipelined ADC core
- CMOS or LVDS DDR digital outputs
- Duty cycle stabilizer
- Fast OTR detection
- Flexible input voltage range: 1 V to 2 V p-p with 6 dB programmable fine gain
- INL ±
- 1 LSB, DNL ±
- 0.5 LSB (typical)
- Input bandwidth, 600 MHz
- Offset binary, 2's complement, gray code
- Power dissipation, 387 at 80 Msps
- Power-down and Sleep modes
- Sample rate up to 80 Msps
- SFDR, 90 dBc
- Single 3 V supply
- SNR, 73 dB
- SPI Interface
ADC1410S080HN - Block Diagram
説明
The ADC1410S080HN is a single channel 14-bit Analog-to-Digital Converter (ADC) optimized for high dynamic performances and low power consumption at a sample rates of 80 Msps. Pipelined architecture and output error correction ensure the ADC1410S080HN is accurate enough to guarantee zero missing codes over the entire operating range. Supplied from a single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode, thanks to a separate digital output supply. It supports the LVDS (Low Voltage Differential Signaling) DDR (Double Data Rate) output standard. An integrated SPI (Serial Peripheral Interface) allows the user to easily configure the ADC. The device also includes a programmable gain amplifier with a flexible input voltage range.
