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Low Skew Fan Out Buffers

パッケージ情報

CADモデル: View CAD Model
Pkg. Type: SSOP
Pkg. Code: PYG28
Lead Count (#): 28
Pkg. Dimensions (mm): 10.2 x 5.3 x 1.73
Pitch (mm): 0.65

環境及び輸出分類情報

Pb (Lead) Free Yes
Moisture Sensitivity Level (MSL) 1
ECCN (US)
HTS (US)

製品スペック

Pkg. Type SSOP
Lead Count (#) 28
Pb (Lead) Free Yes
Carrier Type Tube
Accepts Spread Spec Input Yes
Advanced Features Accepts Spread Spec Input
Core Voltage (V) 3.3
Function Buffer
Input Freq (MHz) 10 - 133
Input Type LVCMOS
Inputs (#) 1
Length (mm) 10.2
MOQ 141
Moisture Sensitivity Level (MSL) 1
Output Freq Range (MHz) 10 - 133
Output Skew (ps) 110
Output Type LVCMOS
Output Voltage (V) 3.3
Outputs (#) 10
Package Area (mm²) 54.1
Pb Free Category e3 Sn
Pitch (mm) 0.65
Pkg. Dimensions (mm) 10.2 x 5.3 x 1.73
Qty. per Carrier (#) 47
Qty. per Reel (#) 0
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Supply Voltage (V) 3.3 - 3.3
Tape & Reel No
Temp. Range (°C) 0 to 70°C
Thickness (mm) 1.73
Width (mm) 5.3
掲載 No

説明

The IDT9179-03 generates low skew clock buffers required for high speed RISC or CISC microprocessor systems such as Intel PentiumPro. Outputs will handle up to 133MHz clocks. An output enable is provided for testability. The device is a buffer with low output to output skew. This is a Fanout buffer device, not using an internal PLL. This buffer can also be a feedback to an external PLL stage for phase synchronization to a master clock. There are a total of ten outputs, sufficient for feedback to a PLL source and to drive four small outline DIMM modules (S.O. DIMM) at 2 clocks each. Or a total of ten outputs as a Fanout buffer from a common clock source. The individual clock outputs are addressable through I2C to be enabled, or stopped in a low state for reduced EMI when the lines are not needed.