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512 x 18 SyncFIFO, 3.3V

パッケージ情報

Lead Count (#) 64
Pkg. Code PP64
Pitch (mm) 0.5
Pkg. Type TQFP
Pkg. Dimensions (mm) 10.0 x 10.0 x 1.4

環境及び輸出分類情報

Pb (Lead) Free No
Moisture Sensitivity Level (MSL) 3
ECCN (US)
HTS (US)

製品スペック

Lead Count (#) 64
Pb (Lead) Free No
Carrier Type Reel
Moisture Sensitivity Level (MSL) 3
Architecture Uni-directional
Bus Width (bits) 18
Core Voltage (V) 3.3
Density (Kb) 9
Family Name SyncFIFO
I/O Frequency (MHz) 1 - 1
I/O Type 3.3 V LVTTL
Interface Synchronous
Length (mm) 10
MOQ 500
Organization 512 x 18
Package Area (mm²) 100.0
Pb Free Category e0
Pitch (mm) 0.5
Pkg. Dimensions (mm) 10.0 x 10.0 x 1.4
Pkg. Type TQFP
Qty. per Carrier (#) 0
Qty. per Reel (#) 500
Reel Size (in) 13
Requires Terms and Conditions Does not require acceptance of Terms and Conditions
Tape & Reel Yes
Temp. Range (°C) 0 to 70°C
Thickness (mm) 1.4
Width (mm) 10

説明

The 72V215 is a 512 x 18 First-In, First-Out (FIFO) memory with clocked read and write controls. It is a 3.3V version of the 72215 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock (RCLK) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronously of one another for dual clock operation.