概要
説明
Our ADC demonstration board is suitable for dynamic performances evaluation from low to high IF configuration. A FPGA mother board (Xilinx, Altera, and Lattice) could be connected to ease the evaluation and analysis of the ADC dynamic and enable usage of the JESD204A full features sets.
特長
- SMA connector for clock and analog inputs signal
- On board Data clock generator
- On board demodulator + LO synthesizer
- Single POWER supply (on board regulators)
アプリケーション
製品選択
適用されたフィルター
