The SH7046 Series single-chip RISC (Reduced Instruction Set Computer) microprocessors integrate a Renesas-original RISC CPU core with peripheral functions required for system configuration.
The SH7046 series CPU has a RISC-type instruction set. Most instructions can be executed in one state (one system clock cycle), which greatly improves instruction execution speed. In addition, the 32-bit internal-bus architecture enhances data processing power. With this CPU, it has become possible to assemble low cost, high performance/high-functioning systems, even for applications that were previously impossible with microprocessors, such as real-time control, which demands high speeds.
In addition, the SH7046 series includes on-chip peripheral functions necessary for system configuration, such as large-capacity ROM and RAM, timers, a serial communication interface (SCI), an A/D converter, an interrupt controller (INTC), and I/O ports.
There are two versions of on-chip ROM: F-ZTAT™ (Flexible Zero Turn Around Time) that includes flash memory, and mask ROM. The flash memory can be programmed with a programmer that supports SH7046 series programming, and can also be programmed and erased by software. This enables LSI chip to be re-programmed at a user-site while mounted on a board.
- CPU core
- SH-2 (Renesas' proprietary SuperH 32bits RISC)
- Maximum operating frequency 50 MHz 4.0 to 5.5 V operation
- 32 bits multiplier (32 bits x 32 bits = 64 bits)
- On-chip functions
- Powerful 16 bits timer (MTU,MMT)
- Maximum of 15 phase PWM waveform can be output
- DTC installed
- A/D converter: 10 bits , 12 ch (4 ch x 3 units)
- SCI: 2 ch
Pin Count / Memory Size Lineup:
Below you will find information to support the development of your application.
You can find an explanation of orderable part numbers here.
Resources for Software and Hardware
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|e-learning||Information for studying and learning about microcontrollers and microprocessors.|
|FAQ||Frequently asked questions and useful hints for development.|
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Hardware Design Support
|IBIS/BSDL||IBIS standard simulation data is required for high-speed board design and can be used to run simulations to examine and troubleshoot issues such as waveform reflection, ringing, and so on, before producing the actual board.
BSDL is a data input format supported by most IEEE 1149.1 (JTAG)-compliant tools. The automatic test pattern generation (ATPG) and automatic test equipment functions of these tools facilitate testing.
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