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Features

  • Input Offset Voltage : ±1 mV (TYP.) (±3 mV MAX.)
  • VIO Temperature Drift : ±7 µV/°C (TYP.)
  • Input Bias Current : 50 pA (TYP.)
  • Slew Rate : 15 V/µs (TYP.)
  • Unity Gain Frequency : 4 MHz (TYP.)
  • Input Equivalent Noise Voltage Density : 19 nV√ Hz (TYP.) (f = 1 kHz)
  • Stable operation against capacitive load : (Capacitive Load at 10000 pF, AV = +1 )
  • Built-In Phase Compensation Circuit
  • Built-In Output Short Circuit Protection
  • Standard Dual Op-Amp terminal connection (pin compatible)

Description

µPC812, 4092 are unique J-FET input dual operational amplifiers that uses a high-speed PNP transistor (fT =300 MHz) for the output stage to achieve fast response and high stability. The resistor-trimming method proven in other Renesas High-Precision Op-Amp and High-Precision reference voltage is incorporate in this Op-Amp input stage, thus producing an excellent low offset voltage characteristics that has surpasses conventional general purpose op-amp in spite of being JFET input. Depending on the operating ambient temperature, µPC812 is suitable to communication application while µPC4092 is for general-purpose usage. In addition to this series of line-up, single channel type operational amplifier, µPC811, 4091 with the same circuit configuration are also available.

Parameters

Attributes Value
Channels (#) 2
Temp. Range (°C) -40 to +85, -40 to +85°C
Bandwidth (MHz) 4
Offset Voltage (Max) (mV) 3
IBIAS (nA) 0.05
CMRR (dB) 100
Rail-to-Rail Input No
Rail-to-Rail Output No
Common Mode Input Voltage Range (V) 5 - 16
IS per Amp (mA) 5
Single Supply Voltage Range (V) -
Slew Rate (V/µs) 15
VS (Min) (V) 5
VS (Max) (V) 16
Topology [Rail 1] -
Enable -
Input Offset Voltage Vio (Max) (mV (±)) 3
Supply Current Icc/Idd (Max) (mA) 6.8
Qualification Level Standard
Simulation Model Available SPICE

Package Options

Pkg. Type Pkg. Dimensions (mm) Lead Count (#) Pitch (mm)
SOP 5.2 x 4.4 8 0.65
SOP 8 0.65

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