Package Information
| CAD Model: | View CAD Model |
| Pkg. Type: | WLCSP |
| Pkg. Code: | |
| Lead Count (#): | 48 |
| Pkg. Dimensions (mm): | 3.241 x 2.575 0.35 pitch |
| Pitch (mm): |
Environmental & Export Classifications
| Pb (Lead) Free | |
| Moisture Sensitivity Level (MSL) | |
| ECCN (US) | |
| HTS (US) |
Product Attributes
| Pkg. Type | WLCSP |
| Lead Count (#) | 48 |
| Temp. Range (°C) | -40 to +85°C |
| BRAM (kbit) | 32 |
| Configuration Modes | SPI Controller, SPI Target, OTP |
| D Flip-flops (DFFs) (#) | 1120 |
| Distributed Memory (kbit) | 5 |
| GPIOs (#) | 40 |
| LVDS Channels (#) | 3 |
| Look-up Table (LUTs) | 1120 |
| Memory Type | OTP |
| On-chip Oscillator | Yes |
| On-chip Oscillator Freq. | 50MHz / 3MHz |
| PLLs | 1 |
| Pkg. Dimensions (mm) | 3.241 x 2.575 0.35 pitch |
| Sleep/Reset Mode Current (µA) | 77 |
| Special Features | Sleep Mode,Fast Route,Bitstream AES Decryption,Boot Control |
| Static State Iddc (µA) | 118 |
| Vddc | 1.05 - 1.15 |
| Vddio | 1.71 - 3.465 |
| Vddio Domains (#) | 2 |
Resources for SLG47912
Description
The SLG47912 is a small, low-power device for common FPGA applications. Users create a circuit design by programming the one-time programmable (OTP) non-volatile memory (NVM) or providing a bitstream through an SPI interface to configure the FPGA core, the IO pins, and the macrocells of the chip. This highly versatile device enables a wide range of FPGA applications.
