Overview
Description
The SLG46538 programmable mixed-signal matrix with asynchronous state machine and dual supply provides a small, low-power component for mixed-signal functions. The user creates their circuit design by programming the one-time programmable (OTP) non-volatile memory (NVM) to configure the interconnect logic, the I/O pins, and the macrocells of the SLG46538. This highly versatile device allows for a wide variety of mixed-signal functions to be designed within a very small, low-power single integrated circuit. The additional power supply (VDD2) on the SLG46538 provides the ability to interface two independent voltage domains within the same design. Users can configure pins, dedicated to each power supply, as inputs, outputs, or both (controlled dynamically by internal logic) to both VDD and VDD2 voltage domains. Using the available macrocells, designers can implement mixed-signal functions bridging both domains or simply pass through level translation in both High to Low and Low to High directions.
Features
- Logic and Mixed Signal Circuits
- Highly Versatile Macrocells
- Read Back Protection (Read Lock)
- 1.8V (±5%) to 5V (±10%) VDD
- 1.8V (±5%) to 5V (±10%) VDD2 (VDD2 ≤ VDD)
- Operating Temperature Range: -40°C to 85°C
- RoHS-Compliant/Halogen-Free
- Macrocells Overview
- Four Analog Comparators (ACMP)
- Two Voltage References (Vref)
- Nineteen Combination Function Macrocells
- Three Selectable DFF/Latch or 2-bit LUTs
- One Selectable Continuous DFF/Latch or 3-bit LUT
- Four Selectable DFF/Latch or 3-bit LUTs
- One Selectable Pipe Delay or 3-bit LUT
- One Selectable Programmable Function Generator or 2-bit LUT
- Five 8-bit Delays/Counters or 3-bit LUTs
- Two 16-bit Delays/Counters or 4-bit LUTs
- Two Deglitch Filters with Edge Detectors
- State Machine
- Eight States
- Flexible Input Logic from State Transitions
- Serial Communications
- I2C Protocol Compliant
- Pipe Delay – 16 Stage/3 Output (Part of Combination Function Macrocell)
- Programmable Delay
- One Inverter
- Two Oscillators (OSC)
- Configurable 25kHz/2MHz
- 25MHz RC Oscillator
- Crystal Oscillator
- Power-On Reset (POR)
- Eight-Byte RAM + OTP User Memory
- RAM Memory Space that is Readable and Writable via I2C
- User-defined Initial Values Transferred from OTP
Comparison
Applications
Documentation
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|---|---|---|
| Type | Title | Date |
| Datasheet | PDF 2.59 MB | |
| Device Errata | PDF 1.01 MB | |
| Application Note | PDF 404 KB | |
| Application Note | PDF 689 KB | |
| Application Note | PDF 338 KB | |
| Application Note | PDF 417 KB | |
| Application Note | PDF 503 KB | |
| Application Note | PDF 522 KB | |
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Design & Development
Software & Tools
Boards & Kits
Models
ECAD Models
Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on the CAD Model links in the Product Options table. If a symbol or model isn't available, it can be requested directly from SamacSys.
Support
Support Communities
Support Communities
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SLG46538V _ In circuit Programming
We are using SLG46538V in our custom board. We want to debug the design via PC using GreekPak5 Designer. Can we use SLG4DVKISP (http://www.silego.com/buy/index.php?main_page=product_info&cPath=66_74&products_id=727) to interface GreekPak5 Designer ...
May 15, 2020 -
Reversed bit order of i2c matrix virtual outputs compared to SLG46538
Was surprised to see our code for setting bits on and off via i2c in SLG46538 didn't just work in SLG46826, aside from the different register address used. The earlier SLG46538 had virtual output 0 at the low bit of register F4 and virtual output 7 at the high ...
Aug 2, 2018 -
Total delay when configured as a level shifter
Hi, I'm trying to estimate the total delay from an input pin to an output pin when configuring the SLG46539 as a dual-supply level shifter. The inputs will come from the low-voltage 1.8V domain (VDD2) and need to be level-shifted up to 2.7V - 4 ...
Jun 2, 2019