Features
- DC/DC Input voltage range: 4.5V to 16V Shutdown current: 1uA (typ.) Auto PFM mode Maximum output current: 3A Synchronous rectification type step-down DC/DC Integrated power MOSFETs Switching frequency: 1.1MHz (fixed) Output voltage range: 0.8V to 6V Internal phase compensator Soft start: 2ms (fixed) Discharge circuit Power Good Battery backup circuit (RAA23022x)
- Protection circuit Short circuit protection (latch type) Thermal shutdown circuit: 165°C (typ.) Under voltage lockout circuit (recovery type)
- Package 20-pin HTSSOP
Description
The RAA23022x and RAA23023x are dual step-down DC/DC converter, 4. 5V to 16V input voltage rage and 3A output current. Auto PFM mode makes devices low power operation at light load, so it makes a system lower power. The RAA23022x is suitable for battery backup system using lithium primary cell with built-in battery backup circuit.
| Part Number | Status | Samples | Stock | RoHS | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pb (Lead) Free |
|---|---|---|---|---|---|---|---|---|---|
| RAA230231GSB#HA0 | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | HTSSOP | 20# | Embossed Tape | 3 | Yes |
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- Application NotePDF 645 KB R02AN0036EJ0101 Rev.1.01 Jul 17, 2019AI-generated Summary: The document provides examples of external components for DC/DC converters, including inductors and ferrite beads with specific values and manufacturers. It details maximum output currents and consumption currents for specific channels and voltage levels. Voltage waveforms during startup and shutdown demonstrate quick output voltage turn-off to prevent malfunctions. Efficiency graphs show high power conversion efficiency in Auto PFM mode, reducing system power consumption. It advises separating control signal ground from power line ground to minimize common impedance. Contact information and website links for support are also included.
- Product Change Notice
- Product Change Notice
- Product Change Notice
- DatasheetRAA23022x RAA23023x DatasheetRECOMMENDED
- Application NotePDF 1.3 MB R19AN0015ED0102 Rev.1.02 Jul 01, 2013AI-generated Summary: The document provides layout recommendations and design rules for a dual port Ethernet PHY device supporting 10Base-T, 100Base-TX, and 100Base-FX. It covers strap pin configuration options for initial start-up settings, detailing the use of pull-up and pull-down resistors, including recommended resistor values and schematic examples. The strap pins function only during power-up or reset, with internal and external resistor configurations advised for noise immunity. Additional chapters address media interfaces, power supply layout, clock input, LED control, and unused pins.
- Application NotePDF 1.21 MB R19AN0014ED0102 Rev.1.02 Jul 01, 2013AI-generated Summary: The document provides layout recommendations and design rules for Dual PHY and Single Channel PHY ASSP devices. It covers strap pin configuration options for initial start-up settings, including pull-up and pull-down resistor values and configurations to ensure stable operation in noisy environments. The layout guidelines include power supply design, differential pair routing, media-dependent interfaces, MAC interfaces, and clock input circuits. Examples and tables illustrate resistor values and schematic configurations for strap pins.
- Application NotePDF 397 KB an1684 Jan 19, 2004AI-generated Summary: The document outlines important legal disclaimers and usage guidelines for semiconductor products. It emphasizes user responsibility for product design and safety, disclaims liability for damages, and clarifies no intellectual property licenses are granted. Products are categorized by quality grades with specific application recommendations. Users must comply with laws, avoid unauthorized modifications, and ensure safe use within specified conditions. Contact details for Renesas Electronics sales offices worldwide are provided.
- Application NotePDF 509 KB an1681 Jan 19, 2004AI-generated Summary: The document explains grounding techniques for PCB layouts using a dual op amp example on a single-layer copper board. It compares three grounding schemes: a center spine ground trace, an outer ground plane, and a split/star ground plane, highlighting the benefits of single-point grounding to minimize noise and antenna effects. It emphasizes following current paths, minimizing loop lengths, and ensuring close forward and return paths to reduce interference. The document also includes disclaimers on product use, quality grades, safety, and legal compliance.
- DatasheetRAA23022x RAA23023x DatasheetRECOMMENDED
Recommended Documents (1)
- DatasheetRAA23022x RAA23023x DatasheetRECOMMENDED
Datasheets (1)
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- Application NotePDF 645 KB R02AN0036EJ0101 Rev.1.01 Jul 17, 2019AI-generated Summary: The document provides examples of external components for DC/DC converters, including inductors and ferrite beads with specific values and manufacturers. It details maximum output currents and consumption currents for specific channels and voltage levels. Voltage waveforms during startup and shutdown demonstrate quick output voltage turn-off to prevent malfunctions. Efficiency graphs show high power conversion efficiency in Auto PFM mode, reducing system power consumption. It advises separating control signal ground from power line ground to minimize common impedance. Contact information and website links for support are also included.
- Application NotePDF 1.3 MB R19AN0015ED0102 Rev.1.02 Jul 01, 2013AI-generated Summary: The document provides layout recommendations and design rules for a dual port Ethernet PHY device supporting 10Base-T, 100Base-TX, and 100Base-FX. It covers strap pin configuration options for initial start-up settings, detailing the use of pull-up and pull-down resistors, including recommended resistor values and schematic examples. The strap pins function only during power-up or reset, with internal and external resistor configurations advised for noise immunity. Additional chapters address media interfaces, power supply layout, clock input, LED control, and unused pins.
- Application NotePDF 1.21 MB R19AN0014ED0102 Rev.1.02 Jul 01, 2013AI-generated Summary: The document provides layout recommendations and design rules for Dual PHY and Single Channel PHY ASSP devices. It covers strap pin configuration options for initial start-up settings, including pull-up and pull-down resistor values and configurations to ensure stable operation in noisy environments. The layout guidelines include power supply design, differential pair routing, media-dependent interfaces, MAC interfaces, and clock input circuits. Examples and tables illustrate resistor values and schematic configurations for strap pins.
- Application NotePDF 397 KB an1684 Jan 19, 2004AI-generated Summary: The document outlines important legal disclaimers and usage guidelines for semiconductor products. It emphasizes user responsibility for product design and safety, disclaims liability for damages, and clarifies no intellectual property licenses are granted. Products are categorized by quality grades with specific application recommendations. Users must comply with laws, avoid unauthorized modifications, and ensure safe use within specified conditions. Contact details for Renesas Electronics sales offices worldwide are provided.
- Application NotePDF 509 KB an1681 Jan 19, 2004AI-generated Summary: The document explains grounding techniques for PCB layouts using a dual op amp example on a single-layer copper board. It compares three grounding schemes: a center spine ground trace, an outer ground plane, and a split/star ground plane, highlighting the benefits of single-point grounding to minimize noise and antenna effects. It emphasizes following current paths, minimizing loop lengths, and ensuring close forward and return paths to reduce interference. The document also includes disclaimers on product use, quality grades, safety, and legal compliance.
Application Notes & White Papers (5)
- Product Change Notice
- Product Change Notice
- Product Change Notice
Product Notices (PCN, EOL, etc) (4)
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