Features
- Enhancing Tch(MAX.) to 200°C (Operation time until 250 Hr)
- Super low on-state resistance NP100N04MDH, NP100N04NDH RDS(on)1 = 3.3 mΩ MAX. (VGS = 10 V, ID = 50 A) RDS(on)2 = 4.7 mΩ MAX. (VGS = 4.5 V, ID = 50 A) NP100N04PDH RDS(on)1 = 2.9 mΩ MAX. (VGS = 10 V, ID = 50 A) RDS(on)2 = 4.3 mΩ MAX. (VGS = 4.5 V, ID = 50 A)
- High avalanche energy, High avalanche current
- Logic level drive Type
- Low input capacitance Ciss = 8700 pF TYP. (VDS = 25 V)
Description
The NP100N04MDH, NP100N04NDH, NP100N04PDH are N-channel MOS Field Effect Transistors designed for high current switching applications.
| Part Number | Status | Samples | Stock | RoHS | Package | Lead Count (#) | Carrier Type |
|---|---|---|---|---|---|---|---|
| NP100N04MDH | Obsolete | N/A | Out of Stock | RoHS:EN RoHS:JA | MP-25K | 3# | Tube |
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- Application NotePDF 596 KB R07AN0051EJ0100 Rev.1.00 Apr 27, 2026Compares the thermal performance of automotive power MOSFETs in the TOLL (TO-Leadless) package and its derivatives, including the TOLT (TO-Leaded Top-side Cooling) package. The information presented in this document is intended to serve as a comprehensive guideline for designing high-power automotive systems.
- Application NotePDF 936 KB R07AN0050EJ0100 Rev.1.00 Dec 03, 2025Measurement frequency and the influence of parasitic inductance are crucial in capacitance measurements for Power MOSFETs. Split-gate structures, with their low Crss and higher Ciss, face challenges from parasitic inductance, making high-frequency measurements difficult. In contrast, standard-gate trench structures allow relatively accurate results. The influence of parasitic inductance in actual measurements is examined from various perspectives.
- GuidePDF 988 KB R07ZZ0016EJ0100 Rev.1.00 Dec 03, 2025The diagrams in this document show the recommended mounting pad layout dimensions for Renesas Power MOSFETs. In actual PCB design, optimization should consider mounting density, mountability, dimensional tolerances, and other relevant factors.
- Application NoteAI-generated Summary: The document outlines derating standards for Power MOSFETs and IGBTs, emphasizing temperature, humidity, voltage, current, and power limits to ensure device reliability. It discusses package type selection between hermetic sealed and plastic molded types, highlighting the advantages of surface-mount packages for miniaturization. It also details precautions for physical handling, including proper lead forming, cutting, and mounting techniques to prevent stress and damage during installation.
- DatasheetPDF 355 KB D18806EJ3V0DS00 Aug 02, 2011
- DatasheetPDF 355 KB D18806EJ3V0DS00 Aug 02, 2011
Recommended Documents (1)
- DatasheetPDF 355 KB D18806EJ3V0DS00 Aug 02, 2011
Datasheets (1)
- GuidePDF 988 KB R07ZZ0016EJ0100 Rev.1.00 Dec 03, 2025The diagrams in this document show the recommended mounting pad layout dimensions for Renesas Power MOSFETs. In actual PCB design, optimization should consider mounting density, mountability, dimensional tolerances, and other relevant factors.
Manuals & Guides (1)
- Application NotePDF 596 KB R07AN0051EJ0100 Rev.1.00 Apr 27, 2026Compares the thermal performance of automotive power MOSFETs in the TOLL (TO-Leadless) package and its derivatives, including the TOLT (TO-Leaded Top-side Cooling) package. The information presented in this document is intended to serve as a comprehensive guideline for designing high-power automotive systems.
- Application NotePDF 936 KB R07AN0050EJ0100 Rev.1.00 Dec 03, 2025Measurement frequency and the influence of parasitic inductance are crucial in capacitance measurements for Power MOSFETs. Split-gate structures, with their low Crss and higher Ciss, face challenges from parasitic inductance, making high-frequency measurements difficult. In contrast, standard-gate trench structures allow relatively accurate results. The influence of parasitic inductance in actual measurements is examined from various perspectives.
- Application NoteAI-generated Summary: The document outlines derating standards for Power MOSFETs and IGBTs, emphasizing temperature, humidity, voltage, current, and power limits to ensure device reliability. It discusses package type selection between hermetic sealed and plastic molded types, highlighting the advantages of surface-mount packages for miniaturization. It also details precautions for physical handling, including proper lead forming, cutting, and mounting techniques to prevent stress and damage during installation.
Application Notes & White Papers (3)
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