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Features

  • Long-term output jitter <2 nsec over 10 ?sec period
  • External PLL clock feedback path enable "zero delay" I/O clock skew configuration
  • Selectable internal feedback divider provides popular telecom and video clock frequencies (see tables below)
  • Can optionally use external feedback divider to generate other output frequencies.
  • Single 3.3 V supply, low-power CMOS
  • Power-down mode and output tri-state (pin OE)
  • Packaged in 16-pin TSSOP
  • Pb (lead) free package
  • Industrial temperature range available

Description

The MK1575-01 is a clock recovery Phase-Locked Loop (PLL) designed for clock synthesis and synchronization in cost sensitive applications. The device is optimized to accept a low-frequency reference clock to generate a high-frequency data or graphics pixel clock. External loop filter components allow tailoring of loop frequency response characteristics. For low jitter / phase noise requirements refer to the MK2069 products.

Part NumberStatusSamplesStockPackageLead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Qty. per Reel (#)Qty. per Carrier (#)Pb (Lead) FreePb Free CategoryTemp. Range (°C)
MK1575-01GILFObsoleteN/AOut of StockTSSOP16#Tube1096#Yese3 Sn-40 to 85°C
MK1575-01GILFTRObsoleteN/AOut of StockTSSOP16#Reel12500#0Yese3 Sn-40 to 85°C
MK1575-01GLFObsoleteN/AOut of StockTSSOP16#Tube1096#Yese3 Sn0 to 70°C
MK1575-01GLFTRObsoleteN/AOut of StockTSSOP16#Reel12500#0Yese3 Sn0 to 70°C
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