Features
- Generates 4 Regulated Voltages
- Synchronous Buck PWM Controller for DDR VDDQ
- 3A Integrated Sink/Source Linear Regulator with Accurate VDDQ/2 Divider Reference for DDR VTT
- LDO Regulator for GMCH Core
- LDO Regulator for CPU/GMCH VTT Termination
- ACPI Compliant Sleep State Control
- Glitch-free Transitions During State Changes
- Integrated VREF Buffer
- PWM Controller Drives Low Cost N-Channel MOSFETs
- 250kHz Constant Frequency Operation
- Tight Output Voltage Regulation
- All Outputs: ±2% Over Temperature
- Fully-Adjustable Outputs with Wide Voltage Range: Down to 0.8V supports DDR and DDR2 Specifications
- Simple Single-Loop Voltage-Mode PWM Control Design
- Fast PWM Converter Transient Response
- Under and Overvoltage Monitoring on All Outputs
- OCP on the Switching Regulator
- Integrated Thermal Shutdown Protection
- Pb-Free Plus Anneal Available (RoHS Compliant)
Description
The ISL6537 provides a complete ACPI compliant power solution for up to 4 DIMM dual channel DDR/DDR2 Memory systems. Included are both a synchronous buck controller to supply VDDQ during S0/S1 and S3 states. During S0/S1 state, a fully integrated sink-source regulator generates an accurate (VDDQ/2) high current VTT voltage without the need for a negative supply. A buffered version of the VDDQ/2 reference is provided as VREF. Two LDO controllers are also integrated for the GMCH core voltage regulation and for the GMCH and CPU VTT termination voltage regulation. The switching PWM controller drives two N-Channel MOSFETs in a synchronous-rectified buck converter topology. The synchronous buck converter uses voltage-mode control with fast transient response. The switching regulator provides a maximum static regulation tolerance of ±2% over line, load, and temperature ranges. The output is user-adjustable by means of external resistors down to 0. 8V. An integrated soft-start feature brings all outputs into regulation in a controlled manner when returning to S0/S1 state from any sleep state. During S0 the VIDPGD signal indicates that the GMCH and CPU VTT termination voltage is within spec and operational. Each output is monitored for undervoltage events. The switching regulator also has overvoltage and overcurrent protection. Thermal shutdown is integrated.
Applications
- Single and Dual Channel DDR Memory Power Systems in ACPI Compliant PCs
- Graphics Cards - GPU and Memory Supplies
- ASIC Power Supplies
- Embedded Processor and I/O Supplies
- DSP Supplies
| Part Number | Status | Samples | Stock | RoHS | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|
| ISL6537CRZ | Obsolete | N/A | In Stock | RoHS:EN | QFN | 28# | Tube | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | 0 to +70°C |
| ISL6537CRZ-T | Obsolete | N/A | Out of Stock | RoHS:EN | QFN | 28# | Reel | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | 0 to +70°C |
- Application NotePDF 397 KB an1684 Jan 19, 2004AI-generated Summary: The document outlines important legal disclaimers and usage guidelines for semiconductor products. It emphasizes user responsibility for product design and safety, disclaims liability for damages, and clarifies no intellectual property licenses are granted. Products are categorized by quality grades with specific application recommendations. Users must comply with laws, avoid unauthorized modifications, and ensure safe use within specified conditions. Contact details for Renesas Electronics sales offices worldwide are provided.
- Application NotePDF 509 KB an1681 Jan 19, 2004AI-generated Summary: The document explains grounding techniques for PCB layouts using a dual op amp example on a single-layer copper board. It compares three grounding schemes: a center spine ground trace, an outer ground plane, and a split/star ground plane, highlighting the benefits of single-point grounding to minimize noise and antenna effects. It emphasizes following current paths, minimizing loop lengths, and ensuring close forward and return paths to reduce interference. The document also includes disclaimers on product use, quality grades, safety, and legal compliance.
- Application NotePDF 1.32 MB an1123 Oct 31, 2003AI-generated Summary: The document details the power state transitions and timing for ACPI-compliant DDR power generation using the ISL6537 and ISL6506. It explains cold start, sleep, active, and shutdown states, including switch positions and voltage rail behaviors. The design of the evaluation board's regulators, MOSFET selection, and compensation networks are described. Performance under transient loads and ripple voltage characteristics are also presented.
Recommended Documents (1)
Datasheets (1)
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- Application NotePDF 397 KB an1684 Jan 19, 2004AI-generated Summary: The document outlines important legal disclaimers and usage guidelines for semiconductor products. It emphasizes user responsibility for product design and safety, disclaims liability for damages, and clarifies no intellectual property licenses are granted. Products are categorized by quality grades with specific application recommendations. Users must comply with laws, avoid unauthorized modifications, and ensure safe use within specified conditions. Contact details for Renesas Electronics sales offices worldwide are provided.
- Application NotePDF 509 KB an1681 Jan 19, 2004AI-generated Summary: The document explains grounding techniques for PCB layouts using a dual op amp example on a single-layer copper board. It compares three grounding schemes: a center spine ground trace, an outer ground plane, and a split/star ground plane, highlighting the benefits of single-point grounding to minimize noise and antenna effects. It emphasizes following current paths, minimizing loop lengths, and ensuring close forward and return paths to reduce interference. The document also includes disclaimers on product use, quality grades, safety, and legal compliance.
- Application NotePDF 1.32 MB an1123 Oct 31, 2003AI-generated Summary: The document details the power state transitions and timing for ACPI-compliant DDR power generation using the ISL6537 and ISL6506. It explains cold start, sleep, active, and shutdown states, including switch positions and voltage rail behaviors. The design of the evaluation board's regulators, MOSFET selection, and compensation networks are described. Performance under transient loads and ripple voltage characteristics are also presented.
Application Notes & White Papers (3)
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Support Communities
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ISL6537ACRZ-TR5160
I am sourcing the Renesas ISL6537A device and would like to confirm packaging details of below part number to ensure proper documentation and compliance in our procurement process. I have found the Intersil Legacy Nomenclature Guide but I didnt find any information about the -TR5160 suffix. ISL6537ACRZ-TR5160 Could you ...
Mar 27, 2026