Features
- Throughput Rate 100MSPS
- Low Power 650mW
- Integral Linearity Error 1 LSB
- Low Glitch Energy 1pV-s
- TTL/CMOS Compatible Inputs
- Improved Hold Time 0.25ns
- Excellent Spurious Free Dynamic Range
- Pb-free Available
Description
Support is limited to customers who have already adopted these products.
The HI5741 is a 14-bit, 100MSPS, D/A converter which is implemented in the Intersil BiCMOS 10V (HBC-10) process. Operating from +5V and -5. 2V, the converter provides 20. 48mA of full scale output current and includes an input data register and bandgap voltage reference. Low glitch energy and excellent frequency domain performance are achieved using a segmented architecture. The digital inputs are TTL/CMOS compatible and translated internally to ECL. All internal logic is implemented in ECL to achieve high switching speed with low noise. The addition of laser trimming assures 14-bit linearity is maintained along the entire transfer curve.
Applications
- Cellular Base Stations
- Wireless Communications
- Direct Digital Frequency Synthesis
- Signal Reconstruction
- Test Equipment
- High Resolution Imaging Systems
- Arbitrary Waveform Generators
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Pb (Lead) Free | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|
| HI5741BIBZ | Obsolete | N/A | Out of Stock | SOICW | 28# | Tube | No | -40 to +85°C |
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- End Of Life NoticePDF 200 KB PLC15033 Jun 11, 2015
- Product Change NoticePDF 98 KB PCN12094 Dec 19, 2012
- Application NotePDF 480 KB an9629 Apr 12, 2000AI-generated Summary: The document presents multi-tone performance data of the HI5741 device at various clock frequencies, illustrating MTPR (multi-tone power ratio) values with different output tone center frequencies and spacings. It includes detailed graphs showing MTPR performance for output frequencies at fractions of the clock frequency (fcLk/10, fcLk/5, fcLk/4). Additionally, it provides important legal notices and disclaimers regarding product usage, liability, quality grades, safety responsibilities, and compliance with laws and regulations.
- Application NotePDF 654 KB an9619 Apr 12, 2000AI-generated Summary: The document details methods to optimize high-accuracy measurements for a 14-bit DAC by addressing linearity testing, thermal effects, and board layout. It explains calculating LSB size and linearity metrics, emphasizing low temperature coefficient resistors to reduce thermal drift. Board layout recommendations include series termination resistors, matched trace lengths, output loading balance, and careful power plane design to minimize noise and ensure accurate measurements exceeding 80dB dynamic range.
- Application NotePDF 503 KB an9675 Aug 13, 1999AI-generated Summary: Effective Number of Bits (ENOB) depends critically on precise coherence in A/D sampling, with small frequency shifts significantly impacting accuracy. Unwrapping reconstructs coherently sampled sine waves, while windowing controls spectral leakage by shaping the acquisition window. Resampling and interpolation adjust sample sets to avoid leakage in FFT analysis. Different window functions balance side lobe levels and bandwidth, affecting spectral resolution and leakage reduction.
- Application NotePDF 1.08 MB an002 Nov 19, 1998AI-generated Summary: Data acquisition and conversion involve quantization, where the smallest resolvable analog difference (quantum) depends on the full scale range and resolution. Quantization introduces an irreducible error called quantizing error or noise. Aperture time, the conversion time uncertainty, causes amplitude errors when signals change during conversion. Sample-hold circuits reduce aperture time by storing sampled signals. The Sampling Theorem states that sampling frequency must be at least twice the highest signal frequency to avoid distortion from frequency folding or aliasing. Natural binary code is commonly used for digital representation in converters, with the most and least significant bits defining the code's resolution and value.
- Application NotePDF 287 KB an9705 Feb 21, 1997AI-generated Summary: Coherent sampling requires the ratio of signal frequency to sampling frequency to be a rational number, expressed as ko/N. When this condition is not met, frequency smearing occurs across bins. Data Acquisition Systems (DAS) can mitigate this by windowing, fixing sampling frequency and tuning input frequency, or fixing input frequency and tuning sampling frequency. The latter two methods are practical for most systems. Pseudo-code illustrates the frequency response for non-integer ko values.
Recommended Documents (1)
Datasheets (1)
Manuals & Guides (1)
- Application NotePDF 480 KB an9629 Apr 12, 2000AI-generated Summary: The document presents multi-tone performance data of the HI5741 device at various clock frequencies, illustrating MTPR (multi-tone power ratio) values with different output tone center frequencies and spacings. It includes detailed graphs showing MTPR performance for output frequencies at fractions of the clock frequency (fcLk/10, fcLk/5, fcLk/4). Additionally, it provides important legal notices and disclaimers regarding product usage, liability, quality grades, safety responsibilities, and compliance with laws and regulations.
- Application NotePDF 654 KB an9619 Apr 12, 2000AI-generated Summary: The document details methods to optimize high-accuracy measurements for a 14-bit DAC by addressing linearity testing, thermal effects, and board layout. It explains calculating LSB size and linearity metrics, emphasizing low temperature coefficient resistors to reduce thermal drift. Board layout recommendations include series termination resistors, matched trace lengths, output loading balance, and careful power plane design to minimize noise and ensure accurate measurements exceeding 80dB dynamic range.
- Application NotePDF 503 KB an9675 Aug 13, 1999AI-generated Summary: Effective Number of Bits (ENOB) depends critically on precise coherence in A/D sampling, with small frequency shifts significantly impacting accuracy. Unwrapping reconstructs coherently sampled sine waves, while windowing controls spectral leakage by shaping the acquisition window. Resampling and interpolation adjust sample sets to avoid leakage in FFT analysis. Different window functions balance side lobe levels and bandwidth, affecting spectral resolution and leakage reduction.
- Application NotePDF 1.08 MB an002 Nov 19, 1998AI-generated Summary: Data acquisition and conversion involve quantization, where the smallest resolvable analog difference (quantum) depends on the full scale range and resolution. Quantization introduces an irreducible error called quantizing error or noise. Aperture time, the conversion time uncertainty, causes amplitude errors when signals change during conversion. Sample-hold circuits reduce aperture time by storing sampled signals. The Sampling Theorem states that sampling frequency must be at least twice the highest signal frequency to avoid distortion from frequency folding or aliasing. Natural binary code is commonly used for digital representation in converters, with the most and least significant bits defining the code's resolution and value.
- Application NotePDF 287 KB an9705 Feb 21, 1997AI-generated Summary: Coherent sampling requires the ratio of signal frequency to sampling frequency to be a rational number, expressed as ko/N. When this condition is not met, frequency smearing occurs across bins. Data Acquisition Systems (DAS) can mitigate this by windowing, fixing sampling frequency and tuning input frequency, or fixing input frequency and tuning sampling frequency. The latter two methods are practical for most systems. Pseudo-code illustrates the frequency response for non-integer ko values.
Application Notes & White Papers (5)
- End Of Life NoticePDF 200 KB PLC15033 Jun 11, 2015
- Product Change NoticePDF 98 KB PCN12094 Dec 19, 2012
Product Notices (PCN, EOL, etc) (2)
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