5P49V5901

Description:

Lab demonstration and clock jitter measurement showing VersaClock 5. The frequency analyzer shows phase jitter at approximately 575 picoseconds RMS. Presented by Baljit Chandhoke, product manager at IDT. For more information visit the Programmable Clocks page.

Transcript:

Hello, my name is Baljit Chandhoke, and I'm the Product Line Manager of timing products at IDT. Today, I will be giving you a brief lab demonstration of our new product, "VersaClock 5".

VersaClock 5 is a low power clock generator, with best-in-class jitter performance of 0.7 psec. It has extremely low power with core current consumption of only 30 MA. It is extremely programmable, and you can get any frequency you want at the output, up to 350MHz.

Now I'm going to start the lab demonstration. I have with me, an evaluation board. The evaluation board is powered by the USB cable, and is also used to control the VersaClock 5.

This is the Timing Commander software, which controls the VersaClock 5 device. As you see, I have it configured for 125MHz, LVPECL output, on Output 1.

On Output 2, I have it configured at 125MHz, HCSL output. Output 3, I have it configured at 156.25MHz LVDS, and Output 4 has 312.5MHz. All the outputs are operational and have different output frequencies.

Now, let's take a look at the performance. With all these outputs operational, and on Output 1, which is operating at 125MHz, I see 575 fsec RMS phase jitter from 12K to 20MHz.

This is industry leading in the power consumption of 30MA core in the space.

Now let's change the frequency and see what happens to the phase noise. I'm going to change the frequency on Output 1 to 100MHz.

As you see, the frequency changed to 100MHz as shown on the screen, and the phase noise is still 576 fsec, from 12K to 20MHz. The noise floor is close to 150dBc.

So this product maintains the great performance, across a wide range of frequencies, as well as across multiple output types, and with different frequencies of the output.

So it provides you, a complete system solution, meeting the requirements of all your clocking needs in your system.

Description

Transcript

Hi, my name is Shudong Zhen. I'm the application engineer in IDT timing group. Today, I'm going to introduce you to the VersaClock 5 Evaluation Board. The board comes in a box, a full package. First of all, of course, this board is out of the static bag.

This is the board with the USB cable. So, this is the board. It has two power systems. As you can see, there are two red banana jacks and one black banana jack for the power return. Also, we support the USB power for the whole board.

For this demonstration, I'm going to use the USB power because this is the first power supply we recommend you to use. It's easy. You don't need to connect the cables to the bench power supply.

Now here, we have the VersaClock 5 timing commander GUI opened up in a computer and right now, the board is not connected to the software. So, you can see there's no sign of communication between the software and the board. Now, let's make a connection to the board. The USB cable that comes with the box and one side, plug into the USB connector of the PC and then the other side goes to the board, the mini USB connector.

Now, up until this point, we're still not seeing the connection because we need to click on this chips symbol sign to make the connection but before I do that, I want to show you the default frequency output from the board.

Now, here is the scope, with the SMA connector cables. I'm going to connect these to the output one of the board. As you can see, on the scope screen, there is already 100 MHz LVCMOS differential output already, as you can see. So, this is the default output from the chip, output one and one B. As you can see, if I disconnect the power, there's no output and then when I connect to the power, the output is coming out right away. That's the default output.

Now, on this very same output, if I, in the VersaClock 5 Timing Commander GUI, if I change that output to 125 MHz, you're going to see the frequency change. Right now, this is the point I need to make the connection to the board so that the configuration can be downloaded into the chip.

So, first of all, click on the chip sign and then, as you can see, this area becomes green, which is a sign of successful connection to the board. Now, on the right side of this sign, if you hover the mouse onto the sign, you can see write all registers to the chip. Right now, I have 25 megaHertz crystal input. I entered 25 into the input frequency box and then, on the output frequency box for output one, I have entered 125 MHz.

Now, once I write this configuration into the chip, you're going to see the change on the screen, on the scope screen. Now, the GUI shows WriteAll has completed. The scope screen should have shown the 125 MHz output from the default 100 MHz. So, the configuration of the board is very easy once we have a good connection. The desired output frequency can be immediately displayed.

We can also use the bench power supply to power the board. These two red banana jacks and the one black banana jack are for the bench power supply. If we use this cable from the bench power supply to make the connection... So, this is a green cable but still, we use it as a power supply, 3.3 volts and this is for the return, the power return. At the same time, the USB cable can still be connected for the data communication. The power supply is provided by the connectors, although we need to make the jumpers. We know the jumpers will make the selections between the USB power and the jack power. In this case, for example, as you can see, the labels on this connector, the VDDD_J means the power is coming from the jack. So, we need to move the connector into the left side and it's the same move for all the other jumpers, to make the power supply switch. That's for the power supply and then I think that concludes the introduction to the VersaClock 5 Evaluation Board. Thank you very much for you time to listen to this video. Thank you.

This video will show you how to program VersaClock® 5 Low Power Programmable Clock Generator.

Description

IDT's innovative support tool, Timing Commander™, expedites development cycles by empowering customers to program sophisticated timing devices with an intuitive and flexible Graphical User Interface. IDT's Timing Commander is a Windows™-based platform designed to serve user-friendly configuration interfaces, known as personalities, for various IDT products and product families. With a few simple clicks, the user is presented with a comprehensive, interactive block diagram offering the ability to modify desired input values, output values, and other configuration settings. The software automatically makes calculations, reports status monitors, and prepares register settings without the need to reference a datasheet. The tool also automatically loads the configuration settings over USB to an IDT evaluation board for immediate application in the circuit. Once the device has been configured and tuned for optimal system performance, the configuration file can be saved for factory-level programming before shipment. For more information about Timing Commander, visit our Timing Commander page.

Transcript

Narrator: In a data driven world, timing is everything. That's why more and more system design engineers are using products from the world leader in silicon timing, IDT. IDT has earned its reputation for excellence by providing a wide range of leading technologies for wireless and wired communications infrastructure, high performance computing, and advanced power management.

And with a product portfolio 10 times greater than the competition, IDT is uniquely qualified to be your one-stop-shop for timing solutions. IDT's innovative Windows-based software platform, Timing Commander, makes it easy to configure, program, and monitor all your sophisticated timing devices.

Steven: What's great about IDT's Timing Commander is that it helps you avoid tedious manageable configurations so you can focus on other areas of your design.

Narrator: IDT's Timing Commander serves up intuitive configuration interfaces or personalities for all of IDT's programmable timing products. With a few simple clicks, you can generate a comprehensive, interactive block diagram and modified desired input values, output values, and other configuration settings. The software also writes your settings over USB to an IDT evaluation board for immediate application in the circuit. It really is as easy as one, two, three.

Steven: The Timing Commander software automatically makes calculations, monitors status, and prepares register settings so you don't have to reference a data sheet. Built-in documentation is readily available. Just hover over a setting, and real time validation ensures that the configuration complies with data sheet specifications. Whether you're a first time user or an experienced engineer, Timing Commander offers you the right amount of control.

Narrator: To help you program complex devices more intuitively, Timing Commander's advanced features include the ability to create phase noise estimates, generate the schematic symbol and termination circuit and determine the optimal balance between performance and power consumption.

Steven: Once your devices are configured and tuned for optimal system performance, you can save the configuration files for factory-level programming prior to shipment.

Narrator: Timing Commander is just one example of the innovative timing solutions IDT delivers.

Peter: From simple fanout buffers and multiplexers to fully featured products like universal frequency translators, network synchronization devices, and VersaClock families, IDT has a wide range of products optimized for specific applications. You can also count on IDT for the lowest jitter and lowest power features to help you build the world class products your customers demand.

Narrator: It's time to put IDT timing solutions to work for your business, and with the power of Timing Commander software, it's easier than ever. To learn more, visit IDT online or give us a call today.

Description

IDT provides a brief overview of the timing solutions optimized for various configurations using the NXP (Freescale) QorIQ / Layerscape processors.

Presented by Ron Wade, PCI Express timing expert. For more information about IDT's timing solutions, visit www.IDT.com/go/clocks.

TRANSCRIPT

So, hi there, this is Ron Wade again and we're going to be talking about timing solutions that IDT has for NXP's QorIQ and Layerscape CPU. And in the middle here, what I've drawn, in the middle of the box here, is what I refer to as our all-in-one solutions. These are single chips that may have all the clocks you need to build your system around the NXP CPUs. So, the three parts I have listed here are the 6P49V205, the 5P49V5907, and 5P49V5908. These provide a mix of the clocks that were needed over here for the CPU cores and SerDes clocks, and they're all on a single chip. If these suit your needs, these are ideal, these are the smallest core footprint parts to use. 
 
The other approach besides all-in-one is the building block approach, and I'm going to start over here on the left side with the CPU clocks and the memory controller. For this solution over here, we have the 5P49V5901, or it could be a 6901, depending on your requirements. And, this guy has the most flexibility as far as programming up any combination of DDR clock or CPU clock that you want, as well as the 24 MHz USB clock and a 125 MHz clock. 
 
If you're using the Layerscape CPU with the reduced oscillator mode where you have the 100 MHz non-spread clock coming in, you might want to consider the 9FGV0 series or the 9FGL0 series. These are very high-performance PCI Express clock generators, the V being a 1.8 volt part and the L being a 3.3 volt part that are available. The terminations are integrated, they're very low power and they also have some extra copies in case SerDes is a PCI Express SerDes. So, this is the ideal solution if you want to go building block over here. 
 
And then for the SerDes clocks, we've got the 125 MHz differential for Gigabit Ethernet, the 156 MHz for 10 gig, and the 100 MHz for PCIe. We have again a different set of flavors we can go with. We have the 5P49V6901, which is a better performing, lower phase jitter version of the 5901 over here. This guy's ideal if you have a mix of these SerDes frequencies in your design. If you're in a homogeneous environment, for instance, where everything's PCI Express or everything is 125 MHz, then you could use the 9FGV parts, or I'll use an output from over there, over on this side for the 100 MHz output, or you could use these guys programmed up to be 125 as well. Or if you've got a 125 coming from over there, you can use one of the 9DVD buffers which are the 1.8V buffers to fan that out. Likewise, we have similar parts with 3.3-volt power supplies, if that's what you prefer. The 9FGL0 series, it should give you the 100 to the 125, and the 9DVL0 series which can provide a fanout buffer for any of these three frequencies.
 
So, that's an overview of the timing solutions for NXP's QorIQ and Layerscape CPUs. This is Ron Wade at IDT again. Thanks for watching and see you next time.

IDT provides a brief tutorial on the timing solutions required for NXP (Freescale) QorIQ / Layerscape processor-based systems.

Presented by Ron Wade, PCI Express timing expert. For more information about IDT's timing solutions, visit www.IDT.com/go/clocks.

TRANSCRIPT

Hi there, this is Ron Wade with IDT and today we're going to talk about NXP, formerly known as Freescale, CPUs. Specifically the QorIQ and Layerscape CPUs and the timing requirements that they have. So, it's basically divided into a couple of parts here. There's some timing that the CPU itself requires and then there's timing that depends upon your system and the number of SerDes links you have in your design and in your CPU. So, if we talk about the CPU part itself, we have the CPU cores which get a clock, and we have the memory controller inside the CPUs which gets a clock as well. And the memory controller clock is called the DDR clock. The CPU clock is called the SYS_CCB clock in the Freescale nomenclature, excuse me, the NXP nomenclature and those frequencies - they're single-ended clocks and they range, like the DDR from 66.66 MHz up to 100 MHz, and the CPU clocks range from 66.66 up to 133.33 MHz, in some cases. Those are single-ended LVCMOS input clocks. Additionally, some of the CPUs have a USB interface which may require a 24 MHz single-ended clock. And there's also an Ethernet interface built in, a one-gigabit Ethernet interface, that is, takes a 125 MHz single-ended clock as well and that's at 2.5 volts.
 
So, in the Layerscape series of CPUs which are based on the ARM core, Freescale has put into them, what they call a reduced oscillator mode where all the clocks over here basically are reduced by a single differential 100 MHz non-spreading clock, and this saves you from having to figure out and generate all these clocks. However, it has to be non-spread because the USB clock is also derived from it, so, if you're planning to use spread spectrum, you really can't use this mode. And, currently, it's only available in the Layerscape devices, not the legacy QorIQ devices.
 
So, that's the basics for the CPU and the memory controller. Then the SerDes is really dependent upon the particular CPU you're using and how many SerDes lanes you need in your design. So, the SerDes clocks, on the other hand, basically range from 125 MHz differential clock for Gigabit Ethernet, if you're using 10 Gigabit Ethernet, a 156.25 MHz clock is required. And then if you're using PCI Express, you'd use a standard 100 MHz PCI Express clock. All these happen to be differential and the number of SerDes lanes and their capabilities depends on the CPU you're using. So, this gives you an outline of how to just do a quick tally of what kind of clocks you need and in another video, I'll talk about the solutions that IDT has for NXP's devices.