Features
- 2:1 LVDS MUX
- One LVDS output pair
- Two differential clock inputs can accept: LVPECL or LVDS
- Maximum input/output frequency: 2.5GHz
- Translates LVCMOS/LVTTL input signals to LVDS levels by using a resistor bias network on nPCLK0, nPCLK1
- RMS additive phase jitter: 0.06ps (typical)
- Propagation delay: 600ps (maximum)
- Part-to-part skew: 350ps (maximum)
- Full 3.3V supply mode
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) package
Description
The 854S01I is a high performance 2:1 Differential-to-LVDS Multiplexer. The 854S01I can also perform differential translation because the differential inputs accept LVPECL or LVDS levels. The 854S01I is packaged in a small 3mm x 3mm 16 VFQFN package, making it ideal for use on space constrained boards.
Parameters
Attributes | Value |
---|---|
Function | Multiplexer |
Outputs (#) | 1 |
Output Type | LVDS |
Output Freq Range (MHz) | - |
Input Freq (MHz) | - |
Inputs (#) | 2 |
Input Type | LVPECL, LVDS |
Output Banks (#) | 1 |
Core Voltage (V) | 3.3 |
Output Voltage (V) | 3.3 |
Additive Phase Jitter Typ RMS (fs) | 60 |
Package Options
Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
---|---|---|---|
VFQFPN | 3.0 x 3.0 x 1.0 | 16 | 0.5 |
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